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Remember:
The user must force VDDMMC at 3.3 V when using any of these functions:
•
OCSPI1: Refer to
•
LED1: Refer to
•
Camera: Refer to
•
MEMS LED and DFSDM: Refer to
•
SRAM (FMC_NE3): Refer to
•
OCSPI2: Refer to
•
Motor control: Refer to
1. The default setting is in bold.
2. PB8 signal is supplied by VDDMMC. Make sure to supply 3.3V on VDDMMC (Refer to
Three possibilities to force VDDMMC to 3.3V:
1.
Default configuration: Software control (Without hardware modification). In this case, the user must follow
the hardware configuration described in
–
Set 3V3_SW at 3.3 V by software: 3V3_SW_ENABLE (MFX IO0) = 1 (3V3_SW = ON).
2.
Hardware modification to force 3V3_SW to be 'always ON'. If the user prefers 3V3_SW power supply to be
always ON:
–
Remove SB34 or set MFX IO0 in high impedance mode (R130 pull-up resistor forces the enable of
U14 LDO).
Remember:
In this configuration, the user cannot perform a "power OFF" of 3.3 V supply for SDIO2.
3.
Hardware modification to force VDDMMC to 3.3 V (3V3_AO). If the user wants VDDMMC MCU pin to
remain always at 3.3 V without controlling MFX IO0:
–
Remove SB14 and fit SB15 in order to connect this pin to the 3V3_AO power supply.
Remember:
In this configuration, the user cannot use SDIO2 at 1.8 V.
SDIO2 configuration (VDDMMC = 1V8_SW or 3V3_SW)
3V3_SW, 1V8_SW and VDDMMC are set up in order to allow controlling various use-cases with SDIO2 interface,
including power OFF sequence, automatic detection of a UHS1 SD card, and switch from 3.3 V to 1.8 V (Refer to
chapter 3.3).
Pin name
PD6
PD7
PG9
PG10
PG11
PG12
UM2662 - Rev 1
Section 7.7
.
Section 7.10
.
Section 7.11
.
Section 7.2
Section 8.1
Section 8.6
.
Section 8.8
.
Table 13.
VDDMMC default hardware configuration for '3.3V only' functions
Signal name
OCSPI1_NCS (PG6)
3V3_SW_ENABLE (MFX IO0)
1V8_SW_ENABLE (MFX IO8)
Table 14.
SDIO2 pins supplied by VDDMMC (1.8V or 3.3V)
.
.
Setting
JP23
SB34
SB29
Table
13:
Pin function
SDIO2_CK
SDIO2_CMD
SDIO2_D0
SDIO2_D1
SDIO2_D2
SDIO2_D3
UM2662
Power supply
VDDMMC = '3.3 V only'
(1)
[1-2]
(2)
ON
(2)
ON
Section 6.3.5
).
page 24/95
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