Alternate Port Functions - Atmel ATmega32M1 Manual

9.3

Alternate Port Functions

7647H–AVR–03/12
Most port pins have alternate functions in addition to being general digital I/Os.
how the port pin control signals from the simplified
functions. The overriding signals may not be present in all port pins, but the figure serves as a
generic description applicable to all port pins in the AVR microcontroller family.
Figure 9-5. Alternate Port Functions
Pxn
PUOExn: Pxn PULL-UP OVERRIDE ENABLE
PUOVxn: Pxn PULL-UP OVERRIDE VALUE
DDOExn: Pxn DATA DIRECTION OVERRIDE ENABLE
DDOVxn: Pxn DATA DIRECTION OVERRIDE VALUE
PVOExn: Pxn PORT VALUE OVERRIDE ENABLE
PVOVxn: Pxn PORT VALUE OVERRIDE VALUE
DIEOExn: Pxn DIGITAL INPUT-ENABLE OVERRIDE ENABLE
DIEOVxn: Pxn DIGITAL INPUT-ENABLE OVERRIDE VALUE
SLEEP: SLEEP CONTROL
PTOExn: Pxn, PORT TOGGLE OVERRIDE ENABLE
Note: 1. WRx, WPx, WDx, RRx, RPx, and RDx are common to all pins within the same port. clk
SLEEP, and PUD are common to all ports. All other signals are unique for each pin.
Table 9-2 summarizes the function of the overriding signals. The pin and port indexes from
ure 9-5 are not shown in the succeeding tables. The overriding signals are generated internally
in the modules having the alternate function.
Atmel ATmega16/32/64/M1/C1
Figure 9-2
(1)
PUOExn
PUOVxn
1
0
DDOExn
DDOVxn
1
0
PVOExn
PVOVxn
1
0
DIEOExn
DIEOVxn
1
SLEEP
0
SYNCHRONIZER
SET
D Q
L
Q
CLR
PUD: PULLUP DISABLE
WDx: WRITE DDRx
WRx: WRITE PORTx
WPx: WRITE PINx
clk
DIxn: DIGITAL INPUT PIN n ON PORTx
AIOxn: ANALOG INPUT/OUTPUT PIN n ON PORTx
Figure 9-5
can be overridden by alternate
PUD
Q D
DDxn
Q
CLR
WDx
RESET
RDx
1
Q D
0
PORTxn
Q
CLR
RESET
WRx
RRx
RPx
D Q
PINxn
Q
CLR
clk
I/O
DIxn
AIOxn
RDx: READ DDRx
RRx: READ PORTx REGISTER
RPx: READ PORTx PIN
: I/O CLOCK
I/O
shows
PTOExn
WPx
,
I/O
Fig-
67