Table of Contents
Advertisement
Unconnected Pins
Alternate Port Functions
ATtiny26(L)
46
If some pins are unused, it is recommended to ensure that these pins have a defined
level. Even though most of the digital inputs are disabled in the deep sleep modes as
described above, floating inputs should be avoided to reduce current consumption in all
other modes where the digital inputs are enabled (Reset, Active mode, and Idle mode).
The simplest method to ensure a defined level of an unused pin, is to enable the internal
pullup. In this case, the pullup will be disabled during reset. If low power consumption
during reset is important, it is recommended to use an external pullup or pulldown. Con-
necting unused pins directly to V
excessive currents if the pin is accidentally configured as an output.
Most port pins have alternate functions in addition to being general digital I/Os. Figure
35 shows how the port pin control signals from the simplified Figure 32 can be overrid-
den by alternate functions. The overriding signals may not be present in all port pins, but
the figure serves as a generic description applicable to all port pins in the AVR micro-
controller family.
Figure 35. Alternate Port Functions
Pxn
PUOExn:
Pxn PULL-UP OVERRIDE ENABLE
PUOVxn:
Pxn PULL-UP OVERRIDE VALUE
DDOExn:
Pxn DATA DIRECTION OVERRIDE ENABLE
DDOVxn:
Pxn DATA DIRECTION OVERRIDE VALUE
PVOExn:
Pxn PORT VALUE OVERRIDE ENABLE
PVOVxn:
Pxn PORT VALUE OVERRIDE VALUE
DIEOExn: Pxn DIGITAL INPUT-ENABLE OVERRIDE ENABLE
DIEOVxn: Pxn DIGITAL INPUT-ENABLE OVERRIDE VALUE
SLEEP:
SLEEP CONTROL
Note:
1. WPx, WDx, RLx, RPx, and RDx are common to all pins within the same port. clk
SLEEP, and PUD are common to all ports. All other signals are unique for each pin.
or GND is not recommended, since this may cause
CC
(1)
PUOExn
PUOVxn
1
0
DDOExn
DDOVxn
1
0
PVOExn
PVOVxn
1
0
DIEOExn
DIEOVxn
1
SLEEP
0
SYNCHRONIZER
SET
D
Q
D
PINxn
L
Q
CLR
PUD:
PULLUP DISABLE
WDx:
WRITE DDRx
RDx:
READ DDRx
RRx:
READ PORTx REGISTER
WPx:
WRITE PORTx
RPx:
READ PORTx PIN
clk
:
I/O CLOCK
I/O
DIxn:
DIGITAL INPUT PIN n ON PORTx
AIOxn:
ANALOG INPUT/OUTPUT PIN n ON PORTx
PUD
Q
D
DDxn
Q
CLR
WDx
RESET
RDx
Q
D
PORTxn
Q
CLR
WPx
RESET
RRx
RPx
Q
Q
CLR
clk
I/O
DIxn
AIOxn
1477G–AVR–03/05
,
I/O
Advertisement
Table of Contents
