Atmel ATmega32M1 Manual page 265

20.4.2 Analog Comparator 1Control Register – AC1CON
7647H–AVR–03/12
Table 20-2. Analog Comparator 0 negative input selection
AC0M2 AC0M1
0 0
0 0
0 1
0 1
1 0
1 0
1 1
1 1
Bit 7
AC1EN
Read/Write R/W
Initial Value 0
• Bit 7– AC1EN: Analog Comparator 1 Enable Bit
Set this bit to enable the analog comparator 1.
Clear this bit to disable the analog comparator 1.
• Bit 6– AC1IE: Analog Comparator 1 Interrupt Enable bit
Set this bit to enable the analog comparator 1 interrupt.
Clear this bit to disable the analog comparator 1 interrupt.
• Bit 5, 4– AC1IS1, AC1IS0: Analog Comparator 1 Interrupt Select bit
These 2 bits determine the sensitivity of the interrupt trigger.
The different setting are shown in
Table 20-3. Interrupt sensitivity selection
AC1IS1 AC1IS0
0 0
0 1
1 0
1 1
• Bit 3– AC1ICE: Analog Comparator 1 Interrupt Capture Enable bit
Set this bit to enable the input capture of the Timer/Counter1 on the analog comparator event.
The comparator output is in this case directly connected to the input capture front-end logic,
making the comparator utilize the noise canceler and edge select features of the
Timer/Counter1 Input Capture interrupt. To make the comparator trigger the Timer/Counter1
Input Capture interrupt, the ICIE1 bit in the Timer Interrupt Mask Register (TIMSK1) must be set.
In case ICES1 bit ("Timer/Counter1 Control Register B – TCCR1B" on page
rising edge of AC1O is the capture/trigger event of the Timer/Counter1, in case ICES1 is set to
zero, it is the falling edge which is taken into account.
Atmel ATmega16/32/64/M1/C1
AC0M0 Description
0 "Vref"/6.40
1 "Vref"/3.20
0 "Vref"/2.13
1 "Vref"/1.60
0 Bandgap (1.1V)
1 DAC result
0 Analog Comparator Negative Input (ACMPM pin)
1 Reserved
6 5 4
AC1IE AC1IS1 AC1IS0
R/W R/W R/W
0 0 0
Table 18-7.
Description
Comparator Interrupt on output toggle
Reserved
Comparator interrupt on output falling edge
Comparator interrupt on output rising edge
3 2 1
AC1ICE AC1M2 AC1M1
R/W R/W R/W
0 0 0
0
AC1M0 AC1CON
R/W
0
132) is set high, the
265