Atmel ATmega32M1 Manual page 103

7647H–AVR–03/12
Table 12-7 shows the COM0B1:0 bit functionality when the WGM02:0 bits are set to phase cor-
rect PWM mode.
Table 12-7. Compare Output Mode, Phase Correct PWM Mode
COM0B1 COM0B0
0 0
0 1
1 0
1 1
Note: 1. A special case occurs when OCR0B equals TOP and COM0B1 is set. In this case, the Com-
pare Match is ignored, but the set or clear is done at TOP. See
page 98 for more details.
• Bits 3, 2 – Res: Reserved Bits
These bits are reserved bits in the ATmega16/32/64/M1/C1 and will always read as zero.
• Bits 1:0 – WGM01:0: Waveform Generation Mode
Combined with the WGM02 bit found in the TCCR0B Register, these bits control the counting
sequence of the counter, the source for maximum (TOP) counter value, and what type of wave-
form generation to be used, see
unit are: Normal mode (counter), Clear Timer on Compare Match (CTC) mode, and two types of
Pulse Width Modulation (PWM) modes (see
Table 12-8. Waveform Generation Mode Bit Description
Mode WGM02 WGM01
0 0
1 0
2 0
3 0
4 1
5 1
6 1
7 1
Notes: 1. MAX = 0xFF
2. BOTTOM = 0x00
Atmel ATmega16/32/64/M1/C1
Description
Normal port operation, OC0B disconnected.
Reserved
Clear OC0B on Compare Match when up-counting. Set OC0B on
Compare Match when down-counting.
Set OC0B on Compare Match when up-counting. Clear OC0B on
Compare Match when down-counting.
Table 12-8. Modes of operation supported by the Timer/Counter
"Modes of Operation" on page
Timer/Counter
Mode of
WGM00 Operation
0 0 Normal
PWM, Phase
0 1
Correct
1 0 CTC
1 1 Fast PWM
0 0 Reserved
PWM, Phase
0 1
Correct
1 0 Reserved
1 1 Fast PWM
(1)
"Phase Correct PWM Mode" on
95).
Update of TOV Flag
TOP OCRx at Set on
0xFF Immediate
0xFF TOP BOTTOM
OCRA Immediate
0xFF TOP
– –
OCRA TOP BOTTOM
– –
OCRA TOP
(1)(2)
MAX
MAX
MAX
–
–
TOP
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