R&S NRPxxS Series User Manual page 166

®
R&S NRPxxS(N)
Bit No.
6
7
11.3.4 IST Flag and Parallel Poll Enable Register (PPE)
Similar to the service request (SRQ), the IST flag combines the complete status infor-
mation in a single bit. It can be queried by a parallel poll or by *IST?.
The parallel poll enable register (PPE) determines which bits of the STB affect the IST
flag. The bits of the STB are ANDed with the corresponding bits of the PPE; bit 6 is
also used, in contrast to the service request enable register. The IST flag is obtained
by ORing all results together.
The parallel poll enable register can be set and read by *PRE.
11.3.5 Device Status Register
Device
Status
User Manual 1177.5079.02 ─ 10
Meaning
MSS: Master status summary bit
This bit is set if the sensor triggers a service request. This happens if one of the other bits
of this register is set together with its enable bit in the service request enable register
(SRE).
Operation status register summary bit
This bit is set if an EVENt bit is set in the operation status register and the associated
ENABLe bit is set to 1. A set bit denotes that an action is being performed by the sensor.
Information on the type of action can be obtained by querying the operation status register.
See Chapter 11.3.8, "Operation Status
Sensor Error Summary
Sensor Error
Sensor Error
Sensor Error
Sensor Error
Legacy Locked
Reference-PLL Locked
Remote Control Basics
Status Reporting System
Register", on page 170.
0
1
2
3
4
0 5
0 6
7
+
8
0 9
0 10
0 11
0 12
0 13
0 14
0 15
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