Test Descriptions; Attenuator-Driver Test (Relay Drvr) - Tektronix 11A52 Service Manual

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TABLE4-1
11A52 Diagnostic Routines
Area Routine Test/Diagnostic Routine
1 1
Test Attenuator Driver (RELAY DRVR)
1 2
Check Probe Code Stability (PROBECODES)
1 3
Check Signal Path Calconstant Checksum (CKSM PLUG)
1 4
Check Probe Calconstant Checksum (CKSM PROBE)
1 5
Generate Walking-l's on Output Latches (WALK ONES)
2 1
Test Analog to Digital Converter (ADC TEST)
2 2
Test Probe Power Fuses (FUSE TEST)
3 1
Test Analog Control Voltage System (ACVS TEST)
3 2
Give Detailed Information on Calconstant Test Failures
(EXPLAIN CAL)
4and6 1
Test ATTENUATOR GAIN Calconstants (ATTEN GAIN)
4and6 2 Test STEP GAIN Calconstants (STEP GAIN)
4and6 3
Test BANDWIDTH LIMIT MATCH Calconstants (BWL MATCH)
4and6 4 Test OVERALL GAIN Calconstants (GAIN)
4and6
5
Test OUTPUT ERROR Calconstants (OUTPUT ERR)
4and6 6 Test BALANCE Calconstants (BALANCE)
4and6 7 Test COARSE OFFSET Calconstants (COARSE DAC)
4and6 8
Test
FINE
OFFSET Calconstants (FINE DAC)
4and6
9
Test for sufficient SP
ARE
GAIN (SP ARE GAIN)
4and6 10 Calconstant Viewer (CC DUMPER)
5and7
1
Test PROBE GAIN Calconstants (PROBE GAIN)
5and7
2
Test PROBE COARSE OFFSET Calconstants (PRB GAIN)
5and7
3 Test PROBE FINE OFFSET Calconstants (PRB FINE)
5and7
4
Test PROBE IMBALANCE Calconstants (PRB IMBAL)
5and7 5 Test BIAS COMPENSATION Calconstants (BIAS COMP)
5and7 6 Test BIAS ERROR Calconstants (BIAS ERROR)
5and7 7 Calconstant Viewer (CC DUMPER) [Same as 46/10]
8 1 Gain Off Diagnostics (GainOff)
8
2
Gain On Diagnostics (GainOn)
Test Descriptions
Attenuator-Driver Test (RELAY DRVR)
The Attenuator-Driver test exercises the attenuator shift register (U850). The test verifies that the shift
register can clock data through its entire length. This test cannot determine if the drivers actually drive the
relays; its sole purpose is to verify the integrity of the shift register. The relay driver outputs must be tested
using manual methods. The attenuator shift register test first clears the attenuator shift register by clocking in
an appropriate number of O's. The test then begins clocking in l's, and looks for the 1 to appear on the serial
output within a certain number of clocks. If the 1 does not come out of the end of the register within a
predetermined number of clock cycles, the test is flagged as failed.
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