Digital-To-Analog Converter; Address Buffer Latch - Tektronix 11A52 Service Manual

Extended service, two channel amplifier
Hide thumbs Also See for 11A52:
Table of Contents

Advertisement

Theory of Operation
(
Digital-to-Analog Converter
(
The Digital to Analog Converter (DAC) is contained in the AD667 (U630). The AD667 is a complete, voltage
output, 12-bit DAC including a high-stability, buried-zener voltage reference and double-buffered input latch
on a single chip. The converter uses 12 precision high-speed bipolar current-steering switches and a laser-
trimmed thin-film resistor network to provide fast settling time and high accuracy.
Latching in data
The DAC latch control lines are described below:
TABLE2-5
DAC Latch Control Lines
Name
in#
Descri tion
CS(L)
11
Enables latchin inside DAC
A3(L)
12
Enables final latchin of 12-bit value to DAC
A2(L)
13
er four MSBs of DAC value
Al(L)
14
Enables initial latchin
AO(L)
15
Enables initial latchin of lowest four LSBs of DAC value
A low on any pin shown above will enable the described function. The latches are transparent when the control
signals are low and latch when the control signals go high. In the 11A52 the CS(L) signal is tied low so the
DAC is always receptive to having the latches loaded.
·
Once the 12-bit digital value is loaded, that value is converted to an analog current at the minus input of the
on-chip operational amplifier. The op-amp adjusts its output such that the minus input of the op-amp is
always at GND potential. In this manner the DAC current is converted to an output voltage that represents the
digital input code minus an offset voltage. The offset is generated by the on-chip reference circuit, which is
connected so that for a digital code of 0 the total output voltage will be -5 V (at pins 2 and 9) and for a code of
4095 the output will be +5 V. R530 drops a small amount of the reference voltage to help center the output
between ±5 V.
Address Buffer Latch
Eight-bit transparent latch U800 captures the lower 8 address bits from the MPU's multiplexed address/data
bus, and sends them to the Battery RAM. When U800 pin 11 is high, the latch inputs drive the outputs. When
the gate input goes low, the outputs are latched. The outputs are constantly on because the OE(L) input is wired
low.
11A52 Extended Service Manual
2-13

Advertisement

Table of Contents
loading

Table of Contents