Motorola NXP SYMPHONY DSP56007 Technical Data Manual page 12

Signal/Connection Descriptions
External Memory Interface (EMI)
Table 1-5 External Memory Interface (EMI) Signals (Continued)
Signal
Signal Name
Type
MD0–MD7 Bidi-
rectional
Table 1-6 EMI States during Reset and Stop States
Signal
MA0–MA14
MA15
MCS3
MA16
MCS2
MCAS:
DRAM refresh disabled
DRAM refresh enabled
MA17
MCS1
:
MRAS
DRAM refresh disabled
DRAM refresh enabled
MCS0
MWR
MRD
1-6
Freescale Semiconductor, Inc.
State during
Reset
Tri-stated Data Bus—These signals provide the bidirectional data bus for
EMI accesses. They are inputs during reads from external
memory, outputs during writes to external memory, and tri-
stated if no external access is taking place. If the data bus width
is defined as four bits wide, only signals MD0–MD3 are active,
while signals MD4–MD7 remain tri-stated. While tri-stated,
MD0–MD7 are disconnected from the pins and do not require
external pull-ups.
.
Hardware Reset Software Reset Individual Reset
Driven High Previous State
Driven High Driven High
Driven High Driven High
Driven High Driven High
Driven High Driven High
Driven High Driven High
Driven High Driven High
Driven High Driven High
Driven High Driven High
Driven High Driven High
Driven High Driven High
Driven High Driven High
Driven High Driven High
Driven High Driven High
DSP56007/D
For More Information On This Product,
Go to: www.freescale.com
Signal Description
Operating Mode
Previous State
Previous State
Driven High
Previous State
Driven High
Driven High
Driven Low
Previous State
Driven High
Driven High
Driven Low
Driven High
Driven High
Driven High
Stop Mode
Previous State
Previous State
Driven High
Previous State
Driven High
Driven High
Driven High
Previous State
Driven High
Driven High
Driven High
Driven High
Driven High
Driven High
MOTOROLA