Motorola NXP SYMPHONY DSP56007 Technical Data Manual page 29

Freescale Semiconductor, Inc.
INTERNAL CLOCKS
For each occurrence of T
Characteristics
Internal Operation Frequency
Internal Clock High Period
• with PLL disabled
• with PLL enabled and MF ≤ 4
• with PLL enabled and MF > 4
Internal Clock Low Period
• with PLL disabled
• with PLL enabled and MF ≤ 4
• with PLL enabled and MF > 4
Internal Clock Cycle Time
Instruction Cycle Time
EXTERNAL CLOCK (EXTAL PIN)
The DSP56007 system clock is externally supplied via the EXTAL pin. Timings shown
in this document are valid for clock rise and fall times of 3 ns maximum.
No. Characteristics
— Frequency of External Clock (EXTAL Pin)
1 External Clock Input High—EXTAL Pin
• with PLL disabled
(46.7%–53.3% duty cycle)
• with PLL enabled
(42.5%–57.5% duty cycle)
MOTOROLA
, T , , or I
T
H L C
Table 2-4 Internal Clocks
Table 2-5 External Clock (EXTAL Pin)
Sym.
Ef
1
ET
H
DSP56007/D
For More Information On This Product,
Go to: www.freescale.com
, substitute with the numbers in Table 2-4.
CYC
Symbol
f
T
H
T
L
T
C
I
CYC
50 MHz 66 MHz
Min Max Min Max
0 50 0 66
∞ ∞
9.3 7.1
8.5 235500 6.4 235500
Specifications
Internal Clocks
Expression
—
ET
H
×
(Min) 0.48 T
C
×
(Max) 0.52 T
C
×
(Min) 0.467 T
C
×
(Max) 0.533 T
C
ET
L
×
(Min) 0.48 T
C
×
(Max) 0.52 T
C
×
(Min) 0.467 T
C
×
(Max) 0.533 T
C
×
(DF /MF) ET
C
×
2 T
C
88 MHz
Unit
Min Max
0 88 MHz
∞
5.3 ns
4.8 235500 ns
2-5