Chapter 5: Hardware Platform; Introduction - Xilinx Zynq UltraScale+ User Manual

Mpsoc video codec unit
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Hardware Platform

Introduction

This chapter describes the targeted reference design (TRD) hardware architecture.
Figure 5-1
shows a block diagram of the design components inside the PS and PL on the
ZCU106 base board and the LI-IMX274MIPI-FMC image sensor daughter card.
X-Ref Target - Figure 5-1
ZCU106
PCIe Host
PCI+XDMA
HDMI Sink
HDMI + Audio
SDI Sink
I2S Sink
I2S + Audio TX
Ethernet
Ethernet 10G
Source/Sink
HDMI + Audio
HDMI + Audio
Source
SDI Source
I2S Source
I2S + Audio RX
LI-IMX274MIPI-FMC
IMX274
MIPI CSI
Sensor
Accerlator
Zynq UltraScale+ VCU TRD User Guide
UG1250 (v2019.1) May 29, 2019
SDI TX
SDI RX
VCU
Encoder
TPG
Decoder
SDX Bypass Filter
Accelerator
Figure 5-1: Hardware Block Diagram
www.xilinx.com
Base Platform
VCU DDR
Programmable
Logic
Chapter 5
DP TX
USB
Source
GPU
Processing
System
X19300-051319
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DP
Sink
UVC
54

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