Samsung S3C84I8 User Manual page 341

S3C84I8/F84I8/84I9/F84I9
°
(T = – 25 C to + 85
A
Parameter
Serial port clock cycle time
Output data setup to clock rising edge
Clock rising edge to input data valid
Output data hold after clock rising edge
Input data hold after clock rising edge
Serial port clock High, Low level width
NOTES:
1. All timings are in nanoseconds (ns) and assume a 10-MHz CPU clock frequency.
2. The unit t means one CPU clock period.
CPU
0.8 V
Table 21-10. UART Timing Characteristics in Mode 0 (10 MHz)
°
C, 2.5V to 5.5 V, Load capacitance = 80 pF)
t
HIGH
DD
Figure 21-7. Waveform for UART Timing Characteristics
Symbol Min
t
500
SCK
t
300
S1
t
–
S2
t t – 50
H1 CPU
t
0
H2
t t
200
HIGH, LOW
t
LOW
Typ. Max
× 6
t 700
CPU
× 5
t
CPU
– 300
t
CPU
–
× 3
t 400
CPU
t
SCK
0.2 V
DD
ELECTRICAL DATA
Unit
ns
–
–
–
21-11