Sra Shift Right Arithmetic - Samsung S3C84I8 User Manual

S3C84I8/F84I8/C84I9/F84I9
SRA
— Shift Right Arithmetic
dst
SRA
dst (7) ← dst (7)
Operation:
C ← dst (0)
dst (n) ← dst (n + 1), n = 0–6
An arithmetic shift-right of one bit position is performed on the destination operand. Bit zero (the
LSB) replaces the carry flag. The value of bit 7 (the sign bit) is unchanged and is shifted into the
bit position 6.
C: Set if the bit shifted from the LSB position (bit zero) was "1".
Flags:
Z: Set if the result is "0"; cleared otherwise.
S: Set if the result is negative; cleared otherwise.
V: Always cleared to "0".
D: Unaffected.
H: Unaffected.
Format:
opc
Given: Register 00H = 9AH, register 02H = 03H, register 03H = 0BCH, and C = "1":
Examples:
SRA
SRA
In the first example, if the general register 00H contains the value 9AH (10011010B), the
statement "SRA 00H" shifts the bit values in the register 00H right one bit position. Bit zero ("0")
clears the C flag and bit 7 ("1") is then shifted into the bit 6 position (bit 7 remains unchanged).
This leaves the value 0CDH (11001101B) in the destination register 00H.
7 6
C
dst
→
00H
→
@02H
0
Bytes Cycles
2
Register 00H = 0CD, C = "0"
Register 02H = 03H, register 03H = 0DEH, C = "0"
INSTRUCTION SET
Opcode Addr Mode
(Hex)
4 D0
4 D1
dst
R
IR
6-79