Samsung S3C84I8 User Manual page 125

S3C84I8/F84I8/C84I9/F84I9
Vector Address
Decimal
Value Value
256 100H
222 DEH
220 DCH
218 DAH
216 D8H
214 D6H
212 D4H
210 D2H
208 D0H
206 CEH
202 CAH
200 C8H
198 C6H
196 C4H
194 C2H
192 C0H
190 BEH
NOTES:
1. Interrupt priorities are identified in inverse order: "0" is the highest priority, "1" is the next highest, and so on.
2. If two or more interrupts within the same level contend, the interrupt with the lowest vector address usually has priority
over one with a higher vector address. The priorities within a given level are fixed in hardware.
Table 5-1. Interrupt Vectors
Interrupt Source
Hex
Basic timer (WDT) overflow
UART transmit
UART receive
PWM overflow interrupt
SIO receive / transmit
Watch timer interrupt
P1.3 external interrupt
P1.2 external interrupt
P1.1external interrupt
P1.0 external interrupt
Timer 1(1) overflow
Timer 1(1) match/capture
Timer 1(0) overflow
Timer 1(0) match/capture
Timer A overflow
Timer A match/capture
Timer B underflow
INTERRUPT STRUCTURE
Request
Interrupt Priority in
Level Level
nRESET -
IRQ7 1
0
IRQ6 -
IRQ5 -
IRQ4 -
IRQ3 3
2
1
0
IRQ2 3
2
1
0
IRQ1 1
0
IRQ0 -
Reset/Clear
H/W S/W
√
√
√
√
√
√
√
√
√
√
√ √
√ √
√ √
√ √
√ √
√ √
√
5-7