Ita-5831 Digital Dio Definition; Configuration Sequence - Advantech ITA-5831 Series User Manual

Note! Please download the NXP Semiconductors PAC9554 spec for program-
ming from NXP's website.
https://www.nxp.com/docs/en/data-sheet/
PCA9554_9554A.pdf?fsrch=1&sr=1&pageNum=1
6.1

ITA-5831 Digital DIO Definition

See Section 2.3.3.
6.2

Configuration Sequence

ITA-5831's GPIO is realized through PCA9554 GPIO IC connected to ICH SMBUS.
Therefore, the configuration and access to GPIO IC is completed by IO Space
accessing to ICH SMBUS controller.
Table 6.1: ICH SMBUS IO Space
SMB_BASE+
Offset
00h
02h
03h
04h
05h
06h
For ITA-5831, IO address of the above SMB_BASE is 0xF040. The detailed SMBUS
IO control access code, please refer to Chapter 3.The corresponding SMBUS slave
address of PCA9554 of GPIO 00 - GPIO 07 on ITA-5831 is 0x40 (8bit address):
GPIO 00 – GPIO 07: PCA9554 0x40 (IO0 – IO7)
Table 6.2: Pin Define
PinDIP16, SO16,
Symbol
SSOP16, TSSOP16
A0 1
A1 2
A2 3
IO0 4
IO1 5
IO2 6
IO3 7
VSS 8
IO4 9
IO5 10
IO6 11
IO7 12
INT 13
SCL 14
SDA 15
VDD 16
ITA-5831 User Manual
Mnemonic Register Name
HST_STS Host Status
HST_CNT Host Control
HST_CMD Host Command
XMIT_SLVA Transmit slave address 00h
HST_D0 Host Data 0
HST_D1 Host Data 1
HVQFN16
15
16
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Default Type
00h R/WC,RO, R/WC (special)
00h R/W,W O
00h R/W
R/W
00h R/W
00h R/W
SSOP20 Description
6 Address input 0
7 Address input 1
9 Address input 2
10 Input/output 0
11 Input/output 1
12 Input/output 2
14 Input/output 3
15 Supply ground
16 Input/output 4
17 Input/output 5
19 Input/output 6
20 Input/output 7
1 Interrupt output (open-drain)
2 Serial clock line
4 Serial data line
5 Supply voltage
60