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Note!
Download the specifications for programming the NXP Semiconductors'
PCA9554 GPIO IC from the NXP website.
https://www.nxp.com/docs/en/data-sheet/
PCA9554_9554A.pdf?fsrch=1&sr=1&pageNum=1
6.1
Digital DI/O Definition
See Section 2.3.3.
6.2
Configuration Sequence
ITA-5231's GPIO is realized through the PCA9554 GPIO IC connected to ICH
SMBUS. Therefore, the GPIO IC is configured and accessed through I/O space via
the ICH SMBUS controller.
Table 6.1: ICH SMBUS I/O Space
SMB_BASE+
Mnemonic
Offset
00h
HST_STS
02h
HST_CNT
03h
HST_CMD
04h
XMIT_SLVA
05h
HST_D0
06h
HST_D1
For ITA-5231, the I/O address of the above SMB_BASE is 0xF040. The correspond-
ing SMBUS slave address of PCA9554 for GPIO 00 ~ GPIO 07 on ITA-5231 is 0x40
(8bit address): GPIO 00 ~ GPIO 07: PCA9554 0x40 (IO0 ~ IO7)
Table 6.2: Pin Definitions
Pin DIP16, SO16,
Symbol
SSOP16, TSSOP16
A0
1
A1
2
A2
3
IO0
4
IO1
5
IO2
6
IO3
7
VSS
8
IO4
9
IO5
10
IO6
11
IO7
12
INT
13
SCL
14
SDA
15
VDD
16
n.c.
-
ITA-5231 User Manual
Registration Name
Default Type
Host status
00h
Host control
00h
Host command
00h
Transmit slave address 00h
Host data 0
00h
Host data 1
00h
HVQFN16
SSOP20
15
6
16
7
1
9
2
10
3
11
4
12
5
14
6
15
7
16
8
17
9
19
10
20
11
1
12
2
13
4
14
5
-
3,8,13,18 Not connected
64
R/WC, RO, R/WC (special)
R/W, W O
R/W
R/W
R/W
R/W
Description
Address input 0
Address input 1
Address input 2
Input/output 0
Input/output 1
Input/output 2
Input/output 3
Supply ground
Input/output 4
Input/output 5
Input/output 6
Input/output 7
Interrupt output (open-drain)
Serial clock line
Serial data line
Supply voltage
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