Pca9554 Register 3 - Configuration Register; Example - Advantech ITA-5831 Series User Manual

6.2.5 PCA9554 Register 3 – Configuration register
The register configures the directions of the I/O pins. If a bit this register is set, the
corresponding port pin is enabled as an input with high-impedance output driver. If a
bit in this register is cleared, the corresponding port pin is enabled as an output. At
reset, the I/Os are configured as inputs with weak pull-up to VDD.
Table 6.7: Register 2 – Polarity Inversion register bit description
Bit Symbol Access
7 C7
6 C6
5 C5
4 C4
3 C3
2 C2
1 C1
0 C0
Register 3 is used to set each GPIO as Input or Output:
If the bit is '0', the corresponding GPIO pin is set as Output;
If the bit is '1', the corresponding GPIO pin is set as Input.
6.3

Example

Here take ITA-5831 as an example. Assume GPIO 00 is set as Output and GPIO 7 is
set as Input, with two pins interconnected, how to set the corresponding register?
GPIO 00 corresponds to PCA9554 0x40 IO0, while GPIO 07 corresponds to
PCA9554 0x40 IO7.
Set GPIO 00 as Output:
1. Read SMBUS slave 0x40 register 3 byte value;
2. Set bit 0 of the value read in step 1 as 0 and write it to SMBUS slave 0x40 Reg-
ister 3;
3. Read SMBUS slave 0x40 register 1 byte value;
4. Set bit 0 of the value read in step 3 as 0 or 1 according to low or high of the out-
put value, then write it back to SMBUS slave 0x40 register 1.
Set GPIO 07 as Input:
1. Read SMBUS slave 0x40 register 3 byte value;
2. Set bit 7 of the value read in step 1 as 1 and write it to SMBUS slave 0x40 Reg-
ister 3;
3. Read SMBUS slave 0x40 register 0 byte value;
4. Decide low or high of the input value through bit7 value read in step3.
Value Description
R/W 1* Configures the directions of the I/O pins
R/W 1*
R/W 1* 0= corresponding port pin is enabled as an
R/W 1* OUTPUT
1= In corresponding port pin is enabled as an
R/W 1*
INPUT (Default value)
R/W 1*
R/W 1*
R/W 1*
63 ITA-5831 User Manual