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6.1
ITA-1710 Digital DIO Definition
See Section 2.4.8.
6.2
Configuration Sequence
ITA-1710's on-board GPIO with LPC bus operates by Lattice CPLD.
The configuration and access to CPLD GPIO IC is completed by IO Space accessing
to the system.
Mapping between GPIO IO Space and corresponding GPIO pins:
Port GPO : IO 0xC10~0xC12 (bit0-bit23)
Port GPI : IO 0xC13~0xC15 (bit0-bit23)
Note!
ITA-1210 uses 48 bit CPLD for GPIO control, 24 GPI and 24 GPO
totally.
If a GPIO Pin is Input, users can read the corresponding input value from bit of IO
Space register.
If a GPIO Pin is Output, users can read the corresponding input value from bit of IO
Space register.
6.3
Function Call Reference
GPIO Analog Code (C language pseudocode)
GPO 4 High Output:
unsigned char data;
data = inportb(0xC10); //first read corresponding IO Space register value
data |= 0x08;
Read GPI 9 Input Value:
unsigned char data;
data = inportb(0xC14); //first read corresponding IO Space register value
if (data & 0x01);
else
ITA-1710 User Manual
0xC10:bit0~bit7 GPO(1~8)
0xC11:bit0~bit7 GPO(9~16)
0xC12:bit0~bit7 GPO(17~24)
0xC13:bit0~bit7 GPI(1~8)
0xC14:bit0~bit7 GPI(9~16)
0xC15:bit0~bit7 GPI(17~24)
//00001000B, set bit 03 as '1', meaning output High
outportb(0xC10, data); //output value
//00000001B, judge value of bit 0
High
// 1 = High
Low
// 0 = Low
R/W
R
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