Confirm Error By Status Register (Sr) - Hitachi HIDIC EH-150 Applications Manual

Programable controller; ethernet module(eh-eth)
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9.3.3

Confirm error by status register (SR)

EH-ETH has internally status register(SR) which stores communication status for each ASR connection. You
can monitor this SR and program the retry circuit when the communication error occurs. See the "chapter 8
Register" for detailed status register information.
(1) Open error detected
When open error occurs at the ASER connection of passive station, bit 0 of Error status register(CnESR): open
error bit(OEn) is 1.
To confirm if error occurs in open procedure, read this open error bit as occasion demand.
(2) Transmission error detected
When transmission error occurs at the ASR connection, error status register(CnESR) bit 5: transmission error bit 1.
(3) Receive error detected
When receive error occurs at ASR connection, error status register(CnESR) bit 4: receive error bit 1.
(4) Discard receiving data detected
When data in receiving buffer is broken at ASR connection, error status register(CnESR) discard bit(DISn) 1.
CAUTION
The following errors can not be detected in the status register.
Breaking wire or hardware connection error during on line communication (connection open)
Trouble on other stations during on line communication (connection open)
Chapter 9 Maintenance, check, error
9-5

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