Intel Cyclone V Design Manuallines page 68

Enabling HPS-to-FPGA Bridges from the Preloader
The Preloader checks the status of the FPGA and automatically enables bridges
configured in Platform Designer (Standard) and the BSP if the FPGA is configured. The
Preloader supports programming the FPGA before running automatic bridge enable
tests and code.
For more information, refer to
Enabling HPS-to-FPGA Bridges from U-Boot
The
bridge_enable_handoff
prompt to enable bridges. This command puts the HPS and SDRAM into a safe state
before enabling all bridges after appropriate checks.
For more information, refer to the KDB solution:
bridge on Cyclone V SoC and Arria V SoC Devices?
AN 796: Cyclone V and Arria V SoC Device Design Guidelines
68
5. Embedded Software Design Guidelines for SoC FPGAs
GSRD v13.1 - Programming FPGA from
command can be run from the U-boot command
How can I enable the FPGA2SDRAM
AN-796 | 2018.06.18
HPS.