Table of Contents
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Step Title
Assemble the components of your
Software Development Platform
Select an Operating System (OS) for
your application
Assemble your Software
Development Platform for Linux
Assemble your Software
Development Platform for Bare-metal
Application
Assemble your Software
Development Platform for Partner
OS/RTOS Application
Choose the Boot Loader Software
Selecting Software Tools for
Development, Debug and Trace
Board Bring Up Considerations
Boot and Configuration Design
Considerations
Flash Device Driver Considerations
HPS ECC Design Considerations
HPS SDRAM Considerations
AN 796: Cyclone V and Arria V SoC Device Design Guidelines
6
1. Overview of the Design Guidelines for Cyclone
USB Interface Design Guidelines
QSPI Flash Interface Design Guidelines
SD/MMC and eMMC Card Interface Design Guidelines
NAND Flash Interface Design Guidelines
UART Interface Design Guidelines
I2C Interface Design Guidelines
SPI Interface Design Guidelines
Embedded Software Designer's Checklist for SoC FPGAs
Assembling the Components of Your Software Development Platform
on page 49
Golden Hardware Reference Design
Linux or RTOS
on page 52
Bare Metal
on page 52
Using Symmetrical vs. Asymmetrical Multiprocessing (SMP vs. AMP)
Modes
on page 53
Golden System Reference Design (GSRD) for Linux
GSRD for Linux Development Flow
GSRD for Linux Build Flow
Linux Device Tree Design Considerations
Assembling a Software Development Platform for a Bare-Metal
Application
on page 57
Assembling your Software Development Platform for a Partner OS or
RTOS
on page 58
Choosing Boot Loader Software
Select Software Build Tools
Select Software Debug Tools
Select Software Trace Tools
Board Bring Up Considerations
Boot Design Considerations
Configuration
on page 32
Flash Device Driver Design Considerations
HPS ECC Design Considerations
HPS SDRAM Considerations
®
V SoC FPGAs and Arria
Links
on page 43
on page 44
on page 45
on page 46
on page 46
on page 47
on page 47
on page 50
on page 54
on page 54
on page 55
on page 56
on page 58
on page 60
on page 60
on page 61
on page 28
on page 28
on page 61
on page 61
on page 63
®
V SoC FPGAs
AN-796 | 2018.06.18
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