Determining The Cause Of A Service Interrupt; Servicing Standard Event Status And Questionable Status Events - Keysight Technologies N3301A Programming Manual

The MAV Bit and Output Queue
The Output Queue is a first-in, first-out (FIFO) data register that stores electronic load-to-controller
messages until the controller reads them. Whenever the queue holds one or more bytes, it sets the MAV
bit (4) of the Status Byte register.

Determining the Cause of a Service Interrupt

You can determine the reason for an SRQ by the following actions:
Step 1 Determine which summary bits are active. Use:
*STB? or
Step 2 Read the corresponding Event register for each summary bit to determine which events
caused the summary bit to be set. Use:
STATus:QUEStionable:EVENt?
STATus:OPERation:EVENt?
ESR?
When an Event register is read, it is cleared. This also clears the corresponding summary
bit.
Step 3 Remove the specific condition that caused the event. If this is not possible, the event may
be disabled by programming the corresponding bit of the status group Enable register or
NTR|PTR filter if there is one. A faster way to prevent the interrupt is to disable the service
request by programming the appropriate bit of the Service Request Enable register

Servicing Standard Event Status and Questionable Status Events

This example assumes you want a service request generated whenever the electronic load experiences
a command execution error, or whenever the electronic load's overcurrent, overpower, or
overtemperature circuits have tripped. From figure 3-4, note the required path for a condition at bit 4
(EXE) of the Standard Event Status register to set bit 6 (RQS) of the Status Byte register. Also note the
required path for Questionable Status conditions at bits 1, 3, and 4 to generate a service request (RQS)
at the Status Byte register. The required register programming is as follows:
Step 1 Program the Standard Event Status register to enable an event at bit 4. This allows the
event to be summed into the ESB bit of the Status Byte Register. Use:
*ESE 4
Step 2 Program the Questionable Status register to allow an event at bits 1, 3, or 4 to be summed
into the Questionable summary bit. Use:
STATus:QUEStionable:ENABle 26
Step 3 Program the Service Request Enable register to allow both the Standard Event Status and
the Questionable summary bits from the Status Byte register to generate RQS. Use:
*SRE 40
Step 4 When you service the request, read the event registers to determine which Operation
Status and Questionable Status Event register bits are set, and clear the registers for the
next event. Use:
STATus:OPERation:EVENt;QUEStionable:EVENt?
serial poll
(8 + 32 = 40)
Programming Examples - 3
(2 + 8 + 16 = 26)
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