Buffered (Sample Clock) Edge Counting; Single Point (On-Demand) Edge Counting With Pause Trigger - National Instruments NI cRIO-905x Series User Manual

Embedded compactrio controller with real-time processor and reconfigurable fpga
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You can route the pause trigger to the Gate input of the counter. You can configure the counter
to pause counting when the pause trigger is high or when it is low. The following figure shows
an example of on-demand edge counting with a pause trigger.
Figure 52. Single Point (On-Demand) Edge Counting with Pause Trigger

Buffered (Sample Clock) Edge Counting

With buffered edge counting (edge counting using a sample clock), the counter counts the
number of edges on the Source input after the counter is armed. The value of the counter is
sampled on each active edge of a sample clock and stored in the FIFO. The sampled values
will be transferred to host memory using a high-speed data stream.
The count values returned are the cumulative counts since the counter armed event. That is,
the sample clock does not reset the counter. You can configure the counter to sample on the
rising or falling edge of the sample clock.
The following figure shows an example of buffered edge counting. Notice that counting begins
when the counter is armed, which occurs before the first active edge on Sample Clock.
(Sample on Rising Edge)
Controlling the Direction of Counting
In edge counting applications, the counter can count up or down. You can configure the
counter to do the following:
Always count up
Always count down
Count up when the Counter 0 B input is high; count down when it is low
For information about connecting counter signals, refer to the
section.
Counter Armed
Pause Trigger
(Pause When Low)
SOURCE
0
Counter Value
Figure 53. Buffered (Sample Clock) Edge Counting
Counter Armed
Sample Clock
SOURCE
Counter Value
Buffer
0
1
2
3
0
1
2
3
NI cRIO-905x User Manual | © National Instruments | 69
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Default Counter/Timer Routing

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