Intelligent real-time embedded controller for compactrio (22 pages)
Summary of Contents for National Instruments cRIO-905 Series
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USER MANUAL cRIO-905x Embedded CompactRIO Controller with Real-Time Processor and Reconfigurable FPGA This document describes the features of the cRIO-905x and contains information about mounting and operating the device. In this document, the cRIO-9053, cRIO-9054, cRIO-9055, cRIO-9056, cRIO-9057, cRIO-9058 are referred to collectively as cRIO-905x.
Contents Configuring the cRIO-905x...................... 2 Connecting the cRIO-905x to the Host Computer Using USB........3 Connecting the cRIO-905x to the Host Computer or Network Using Ethernet....4 Configuring Startup Options..................... 4 cRIO-905x Features........................6 Ports and Connectors......................6 Buttons..........................10 LEDs..........................11 Chassis Grounding Screw....................
Connecting the cRIO-905x to the Host Computer or Network Using Ethernet Complete the following steps to connect the cRIO-905x to a host computer or Ethernet network using the RJ-45 Gigabit Ethernet port 0. NI recommends using the RJ-45 Gigabit Ethernet port 0 for communication with deployed systems. Note If your controller has the RJ-45 Gigabit Ethernet port 1, you can configure that port in Measurement &...
cRIO-905x Features Ports and Connectors Figure 1. cRIO-905x Ports and Connectors 1. USB 2.0 Type-C Device Port with Console Out 4. Power Connector 2. USB 3.1 Type-C Host Port 5. SD Association MicroSD Card Removable Storage 3. PFI 0 6. RJ-45 Gigabit Ethernet Ports (one or two, depending on the model) USB 2.0 Type-C Device Port with Console Out When operating a device, use this port to connect the cRIO-905x to a host PC.
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The cRIO-905x has reverse-voltage protection. The following NI power supplies and accessories are available for use with the cRIO-905x. Table 5. Power Supplies Accessory Part Number NI PS-10 Desktop Power Supply, 24 V DC, 5 A, 100-120/200-240 V AC 782698-01 Input NI PS-14 Industrial Power Supply, 24 to 28 V DC, 3.3 A, 100-240 V AC 783167-01...
Buttons Figure 2. cRIO-905x Buttons 1. RESET Button 2. CMOS Reset Button RESET Button Press the RESET button to reset the processor in the same manner as cycling power. Figure 3. Reset Button Behavior Press and hold RESET button for < 5 s Press and hold RESET button for ≥...
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STATUS LED Indicators Table 11. STATUS LED Indicators LED Pattern Indication Blinks twice and The cRIO-905x is in safe mode. Software is not installed, which is the pauses factory default state, or software has been improperly installed on the cRIO-905x. An error can occur when an attempt to upgrade the software is interrupted.
Chassis Grounding Screw Figure 5. cRIO-905x Chassis Grounding Screw 1. Chassis Grounding Screw Note For information about grounding the cRIO-905x, see Grounding the Controller in the cRIO-905x Getting Started Guide. Note For more information about ground connections, visit ni.com/info and enter the Info Code emcground Internal Real-Time Clock...
20 MHz and 100 kHz Timebases When programming C Series modules in Real-Time (NI-DAQmx) mode, the 20 MHz and 100 kHz timebases can be used to generate many of the analog input and analog output timing signals. These timebases can also function as the source input to the 32-bit general-purpose counter/timers.
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IEEE 802.1AS-2011 assumes all communication between devices is done on the OSI layer 2, while IEEE 1588-2008 can support various layer 2 and layer 3-4 communication methods. The IEEE 1588-2008 profile National Instruments implements on the cRIO-905x only supports layer 3-4 communication methods. Operating on the layer 2 yields better performance for the IEEE 802.1AS-2011.
IEEE 1588 External Switch Requirements To take advantage of the network synchronization features of the cRIO-905x controllers, ensure that your network infrastructure meets certain requirements depending on which IEEE 1588 profile is implemented for your application: • IEEE 802.1AS-2011 support—Automatically enables timebase synchronization and enables the use of time-based triggers and timestamping between devices across the network.
Horizontal mounting orientation. Mounting substrate options: • Mount the cRIO-905x directly to a metallic surface that is at least 1.6 mm (0.062 in.) thick and extends a minimum of 101.6 mm (4 in.) beyond all edges of the device. • Use the NI Panel Mounting Kit to mount the cRIO-905x to a metallic surface that is at least 1.6 mm (0.062 in.) thick and extends a minimum of 101.6 mm (4 in.) beyond all edges of the device.
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Figure 14. Rear Mounting the 4-slot cRIO-905x Directly on a Flat Surface Figure 15. Rear Mounting the 8-slot cRIO-905x Directly on a Flat Surface 24 | ni.com | cRIO-905x User Manual...
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What to Do Complete the following steps to front mount the cRIO-905x directly on a flat, rigid surface using the mounting holes. Note NI recommends rear mounting your system on a flat surface in environments with high shock and vibration. Figure 18.
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Figure 22. Mounting the 4-slot cRIO-905x on a Panel Figure 23. Mounting the 8-slot cRIO-905x on a Panel Align the cRIO-905x and the panel mounting plate. 28 | ni.com | cRIO-905x User Manual...
Mounting on a DIN Rail What to Use • cRIO-905x • Screwdriver, Phillips #2 • NI DIN rail mounting kit – 4-slot models - 157254-01 • DIN rail clip • M4 x 10 screws (x2) – 8-slot models - 157268-01 •...
Mounting on a Rack You can use the following rack mount kits to mount the controller and other DIN rail- mountable equipment on a standard 482.6 mm (19 in.) rack. • Industrial Rack Mount Kit, 786411-01 • NI Rack-Mounting Kit, 781989-01 Note You must use the appropriate NI DIN rail mounting kit for your model in addition to a rack-mounting kit.
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Figure 31. Mounting the 8-Slot cRIO-905x on a Desktop Use the Torx T10 screwdriver to remove the two screws from the back of the chassis on the controller side. Use the #1 Phillips screwdriver and the two M3 x 35 screws to attach the adapter bracket to the chassis.
Choosing Your Programming Mode The cRIO-905x supports three programming modes on a per slot basis. Real- Enables you to use C Series modules directly from LabVIEW Real-Time, Time using NI DAQmx. C Series modules appear under the Real-Time Resources item in the MAX Project Explorer window and I/O channels appear as I/O variables under the modules.
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or writes execute fast enough to keep up with hardware timing. If a read or write executes late, it returns a warning. Note DSA modules do not support HWTSP mode. Analog Input Triggering Signal A trigger is a signal that causes an action, such as starting or stopping the acquisition of data. When you configure a trigger, you must decide how you want to produce the trigger and the action you want the trigger to cause.
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The source also can be one of several other internal signals on your cRIO controller. Refer to the "Device Routing in MAX" topic in the NI-DAQmx Help or the LabVIEW Help for more information. Using an Analog Source Some C Series modules can generate a trigger based on an analog signal. In NI-DAQmx, this is called the Analog Comparison Event.
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When you use an analog trigger source, the internal sample clock pauses when the Analog Comparison Event signal is low and resumes when the signal goes high (or vice versa). Note Pause triggers are only sensitive to the level of the source, not the edge. AI Convert Clock Signal Behavior For Analog Input Modules Refer to the Scanned Modules, Simultaneous Sample-and-Hold Modules, Delta-Sigma Modules, and Slow Sample Rate Modules sections for information about the AI Convert Clock...
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configuration, update rate, and output range, are determined by the type of C Series module used. For more information, refer to the documentation included with your C Series module(s). The cRIO controller has eight output timing engines, which means that up to eight hardware- timed analog output tasks can be running at a time on the controller.
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action you want the trigger to cause. The cRIO controller supports internal software triggering, external digital triggering, analog triggering, and internal time triggering. Analog output supports two different triggering actions: AO Start Trigger and AO Pause Trigger. An analog or digital signal can initiate these actions. C Series parallel digital input modules and the controller’s integrated PFI trigger line can be used in any controller slot to supply a digital trigger.
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AO Pause Trigger Signal Use the AO Pause Trigger signal to mask off samples in a DAQ sequence. When AO Pause Trigger is active, no samples occur, but AO Pause Trigger does not stop a sample that is in progress. The pause does not take effect until the beginning of the next sample. When you generate analog output signals, the generation pauses as soon as the pause trigger is asserted.
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individually configured as a digital input (DI) or digital output (DO), if the C Series module being used allows such configuration. All samples of static DI lines and updates of static DO lines are software-timed. Digital Input You can acquire digital waveforms using either parallel or serial digital modules. The DI waveform acquisition FIFO stores the digital samples.
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Using an Internal Source To use DI Sample Clock with an internal source, specify the signal source and the polarity of the signal. Use the following signals as the source: • it Sample Clock • ot Sample Clock • Counter n Internal Output •...
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Using a Digital Source To use DI Reference Trigger with a digital source, specify a source and a rising or falling edge. Either PFI or one of several internal signals on the cRIO controller can provide the source. Refer to the "Device Routing in MAX" topic in the NI-DAQmx Help or the LabVIEW Help for more information.
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software-timed digital output tasks on a single module. On serial digital output modules (formerly known as static digital output modules), you cannot mix hardware-timed and software-timed tasks, but you can run multiple software-timed tasks. You may have a hardware-timed task or a software-timed task include channels from multiple modules, but a hardware-timed task may not include a mix of channels from both parallel and serial modules.
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Refer to the DO Start Trigger Signal and DO Pause Trigger Signal sections in Digital Output Timing Signals for more information about the digital output trigger signals. Digital Output Timing Signals The cRIO controller features the following DO timing signals: •...
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Figure 44. DO Pause Trigger with the Onboard Clock Source Pause Trigger Sample Clock If you are using any signal other than the onboard clock as the source of the sample clock, the generation resumes as soon as the pause trigger is deasserted and another edge of the sample clock is received, as shown in the figure below.
Figure 46. PFI Filter Example PFI Terminal Filtered input goes high when terminal is sampled high on Filter Clock five consecutive filter clocks. Filtered Input Counters with NI-DAQmx The cRIO controller has four general-purpose 32-bit counter/timers and one frequency generator. The general-purpose counter/timers can be used for many measurement and pulse generation applications.
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Table 17. Counter Timing Measurements (Continued) Measurement Implicit Timing Support Sample Clocked Timing Support Buffered Position Buffered Two-Signal Edge Separation Counter Triggering Counters support three different triggering actions: • Arm Start Trigger—To begin any counter input or output function, you must first enable, or arm, the counter.
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Prescaling is intended to be used for frequency measurement where the measurement is made on a continuous, repetitive signal. The prescaling counter cannot be read; therefore, you cannot determine how many edges have occurred since the previous rollover. Prescaling can be used for event counting provided it is acceptable to have an error of up to seven (or one) ticks.
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You can route the pause trigger to the Gate input of the counter. You can configure the counter to pause counting when the pause trigger is high or when it is low. The following figure shows an example of on-demand edge counting with a pause trigger. Figure 52.
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The counter counts the number of edges on the Source input while the Gate input remains active. On each trailing edge of the Gate signal, the counter stores the count in the counter FIFO. The sampled values will be transferred to host memory using a high-speed data stream. The following figure shows an example of an implicit buffered pulse-width measurement.
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Figure 58. Implicit Buffered Pulse Measurement Counter Armed Gate Source Buffer Sample Clocked Buffered Pulse Measurement A sample clocked buffered pulse measurement is similar to single pulse measurement, but a buffered pulse measurement takes measurements over multiple pulses correlated to a sample clock.
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one point of data and returned in units of seconds or ticks. In a pulse measurement, each pair of high and low times is considered one point of data and returned as a paired sample in units of frequency and duty cycle, high and low time or high and low ticks. When reading data, 10 points in a semi-period measurement will get an array of five high times and five low times.
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Figure 63. Large Range of Frequencies with Two Counters Signal to Source Measure (fx) Counter 0 Signal of Known Source Frequency (fk) Counter 1 Gate 3 … N CTR_0_SOURCE (Signal to Measure) CTR_0_OUT Interval (CTR_1_GATE) to Measure CTR_1_SOURCE Next, route the Counter 0 Internal Output signal to the Gate input of Counter 1. You can route a signal of known frequency (fk) to the Counter 1 Source input.
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Divide down (N) is the integer to divide down measured frequency, only used in large range two counters is the sample clock rate, only used in sample clocked frequency measurements Here is how these variables apply to each method, summarized in the table below. •...
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large range are almost the same. The advantage of the sample clocked method is that even when the frequency to measure changes, the measurement time does not and error percentage varies little. For example, if you configured a large range two-counter measurement to use a divide down of 50 for a 50 k signal, then you would get the measurement time and accuracy listed in the 50 kHz Frequency Measurement Methods table.
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Figure 66. X1 Encoding Ch A Ch B Counter Value • X2 Encoding—The same behavior holds for X2 encoding except the counter increments or decrements on each edge of channel A, depending on which channel leads the other. Each cycle results in two increments or decrements, as shown in the following figure. Figure 67.
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Figure 71. Buffered Position Measurement Counter Armed Sample Clock (Sample on Rising Edge) Ch A Ch B Count Buffer Two-Signal Edge-Separation Measurement Two-signal edge-separation measurement is similar to pulse-width measurement, except that there are two measurement signals—Aux and Gate. An active edge on the Aux input starts the counting and an active edge on the Gate input stops the counting.
The figure below shows an example of a sample clocked buffered two-signal separation measurement. Figure 74. Sample Clocked Buffered Two-Signal Separation Measurement Sample Clock GATE SOURCE Counter Value Buffer Note If an active edge on the Gate and an active edge on the Aux does not occur between sample clocks, an overrun error occurs.
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• Finite Implicit Buffered Pulse Train Generation • Continuous Buffered Implicit Pulse Train Generation • Finite Buffered Sample Clocked Pulse Train Generation • Continuous Buffered Sample Clocked Pulse Train Generation Finite Pulse Train Generation This function generates a train of pulses with programmable frequency and duty cycle for a predetermined number of pulses.
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The figure below shows a continuous pulse train generation (using the rising edge of Source). Figure 80. Continuous Pulse Train Generation SOURCE Counter Armed Continuous pulse train generation is sometimes called frequency division. If the high and low pulse widths of the output signal are M and N periods, then the frequency of the Counter n Internal Output signal is equal to the frequency of the Source input divided by M + N.
Pulse Generation for ETS In the equivalent time sampling (ETS) application, the counter produces a pulse on the output a specified delay after an active edge on Gate. After each active edge on Gate, the counter cumulatively increments the delay between the Gate and the pulse on the output by a specified amount.
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Some of these options may not be available in some driver software. Refer to the "Device Routing in MAX" topic in the NI-DAQmx Help or the LabVIEW Help for more information about available routing options. Routing Counter n Source to an Output Terminal You can route Counter n Source out to any PFI terminal.
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• Analog Comparison Event • Change Detection Event A counter’s Internal Output can be routed to a different counter’s HW Arm. Some of these options may not be available in some driver software. Refer to the "Device Routing in MAX" topic in the NI-DAQmx Help or the LabVIEW Help for more information about available routing options.
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NI trademarks. Other product and company names mentioned herein are trademarks or trade names of their respective companies. For patents covering NI products/technology, refer to the appropriate location: Help»Patents in your software, the file on your media, or the National Instruments Patent Notice at . You can find patents.txt ni.com/patents...
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