Digital Output Triggering Signals; Buffered Digital Output - National Instruments NI cRIO-905x Series User Manual

Embedded compactrio controller with real-time processor and reconfigurable fpga
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Buffered Digital Output

A buffer is a temporary storage in computer memory for generated samples. In a buffered
generation, data is moved from a host buffer to the cRIO controller onboard FIFO before it is
written to the C Series module(s).
One property of buffered I/O operations is sample mode. The sample mode can be either finite
or continuous:
Finite—Finite sample mode generation refers to the generation of a specific,
predetermined number of data samples. After the specified number of samples is written
out, the generation stops.
Continuous—Continuous generation refers to the generation of an unspecified number of
samples. Instead of generating a set number of data samples and stopping, a continuous
generation continues until you stop the operation. There are three different continuous
generation modes that control how the data is written. These modes are regeneration,
onboard regeneration, and non-regeneration:
In regeneration mode, you define a buffer in host memory. The data from the buffer
is continually downloaded to the FIFO to be written out. New data can be written to
the host buffer at any time without disrupting the output.
With onboard regeneration, the entire buffer is downloaded to the FIFO and
regenerated from there. After the data is downloaded, new data cannot be written to
the FIFO. To use onboard regeneration, the entire buffer must fit within the FIFO
size. The advantage of using onboard regeneration is that it does not require
communication with the main host memory once the operation is started, which
prevents problems that may occur due to excessive bus traffic or operating system
latency.
With non-regeneration, old data is not repeated. New data must continually be
written to the buffer. If the program does not write new data to the buffer at a fast
enough rate to keep up with the generation, the buffer underflows and causes an
error.

Digital Output Triggering Signals

A trigger is a signal that causes an action, such as starting or stopping the acquisition of data.
When you configure a trigger, you must decide how you want to produce the trigger and the
action you want the trigger to cause. The cRIO controller supports internal software triggering,
external digital triggering, analog triggering, and internal time triggering.
Digital output supports two different triggering actions: DO Start Trigger and DO Pause
Trigger. A digital or analog trigger can initiate these actions. Any PFI terminal can supply a
digital trigger, and some C Series analog modules can supply an analog trigger. For more
information, refer to the documentation included with your C Series module(s).
58 | ni.com | NI cRIO-905x User Manual
Note
Install parallel DO modules in slots 1 through 4 to maximize
accessible FIFO size because using a module in slots 5 through 8 will
reduce the accessible FIFO size.

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