Synchronization Across A Network; Internal Timebase; 20 Mhz And 100 Khz Timebases; 40 Mhz Onboard Clock - National Instruments NI cRIO-905x Series User Manual

20 MHz and 100 kHz Timebases

When programming C Series modules in Real-Time (NI-DAQmx) mode, the 20 MHz and
100 kHz timebases can be used to generate many of the analog input and analog output timing
signals. These timebases can also function as the source input to the 32-bit general-purpose
counter/timers. The 20 MHz and 100 kHz timebases are generated by dividing down the
80 MHz timebase, as shown in the previous figure.

40 MHz Onboard Clock

When programming C Series modules in FPGA mode, the 40 MHz onboard clock is used as
the top-level clock for your LabVIEW FPGA application and C Series module IO nodes. The
40 MHz onboard clock can be used to clock single-cycle timed loops. Derived clocks of
varying frequency can be generated from the 40 MHz onboard clock. The 40 MHz onboard
clock is phase aligned with the incoming 80 MHz clock.
13.1072 MHz, 12.8 MHz, and 10 MHz Timebases and Carrier
Clocks
When programming C Series modules in Real-Time (NI-DAQmx) mode, the 13.1072 MHz,
12.8 MHz, and 10 MHz timebases can be used to generate many of the analog input and
analog output timing signals. These timebases can also function as the source input to the 32-
bit general-purpose counter/timers. The 13.1072 MHz, 12.8 MHz, and 10 MHz timebases are
generated directly from the onboard clock generator.
When programming C Series modules in FPGA mode, the 13.1072 MHz, 12.8 MHz, and
10 MHz carrier clocks can be used as the master clock for C Series analog input and analog
output modules. The 13.1072 MHz, 12.8 MHz, and 10 MHz carrier clocks are available as IO
Nodes in LabVIEW FPGA applications and can be used to correlate the onboard clocks with
self-timed C Series modules containing free-running clocks.

Synchronization Across a Network

Internal Timebase

The onboard 100 MHz oscillator automatically synchronizes to other network-synchronized
devices that are part of the local IEEE 802.1AS or IEEE 1588-2008 subnet, depending on the
active time reference that is being used on the controller.
The 80 MHz, 40 MHz, 20 MHz, 100 kHz, 13.1072 MHz, 12.8 MHz, and 10 MHz timebases
are derived from the onboard oscillator and are synchronized to it. Therefore, the timebases are
also synchronized to other network-synchronized timebases on the IEEE 802.1AS or
IEEE 1588-2008 subnet. This enables analog input, analog output, digital I/O, and counter/
timers to be synchronized to other chassis across a distributed network.
When programming C Series modules in FPGA mode, the Time Synchronization IO Nodes
can be used to synchronize the LabVIEW FPGA application to other network-synchronized
devices.
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