Frequency Division; Frequency Generator Block Diagram; Frequency Generator Output Waveform - National Instruments NI cRIO-905x Series User Manual

Embedded compactrio controller with real-time processor and reconfigurable fpga
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20 MHz Timebase
100 kHz Timebase
The frequency generator generates the Frequency Output signal. The Frequency Output signal
is the Frequency Output Timebase divided by a number you select from 1 to 16. The
Frequency Output Timebase can be either the 20 MHz Timebase, the 20 MHz Timebase
divided by 2, or the 100 kHz Timebase.
The duty cycle of Frequency Output is 50% if the divider is either 1 or an even number. For an
odd divider, suppose the divider is set to D. In this case, Frequency Output is low for (D + 1)/2
cycles and high for (D - 1)/2 cycles of the Frequency Output Timebase.
The following figure shows the output waveform of the frequency generator when the divider
is set to 5.
Frequency
Output
Timebase
FREQ OUT
(Divisor = 5)
Frequency Output can be routed out to any PFI terminal. All PFI terminals are set to high-
impedance at startup. The FREQ OUT signal also can be routed to many internal timing
signals.
In software, program the frequency generator as you would program one of the counters for
pulse train generation.
For information about connecting counter signals, refer to the
section.

Frequency Division

The counters can generate a signal with a frequency that is a fraction of an input signal. This
function is equivalent to continuous pulse train generation. Refer to the
Train Generation
section for detailed information.
For information about connecting counter signals, refer to the
section.
94 | ni.com | NI cRIO-905x User Manual
Figure 83. Frequency Generator Block Diagram
÷
2
Figure 84. Frequency Generator Output Waveform
Frequency
Output
Timebase
Frequency Generator
Divisor
(1–16)
FREQ OUT
Default Counter/Timer Routing
Continuous Pulse
Default Counter/Timer Routing

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