Pc To Computer - Omron SYSMAC 3G8F7-CLK13-E Operation Manual

Controller link support boards for pci bus
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Data Link I/O Response Time
Note
8-3-2

PC to Computer

Input
Input ON response time
Late
1,2,3...
Note
134
1. Noise may increase I/O delays.
2. The data send processing time for the area marked by the asterisk (*) in
the diagram will be affected by the processing capacity of the computer
that is used.
3. The communications cycle time may fluctuate.
4. For details regarding the time required for data exchanges between the
Controller Link Unit and the PC, refer to the Controller Link Units Operation
Manual (W309 or W370).
In the following diagram illustrating the maximum data link I/O response time,
a CS-series PC is used for the PC (#2) and the PC's cycle time is greater than
or equal to the communications cycle time.
Input device
1
Program
2
Late
(ClkReadDatalink)
Data link I/O response time
There are three points shown in the diagram above where processing is
delayed, increasing the data link I/O response time.
1. The input arrives in the PC just after I/O refreshing, causing a delay of up
to one cycle before the input is read into the PC.
2. Data exchange occurs just after the PC at node #2 passes the token that
makes it the polling node, causing a delay of up to one communications
cycle time before the data is transferred in data link processing.
3. The data arrives at the Data Link Area of the Support Board mounted at
the computer at node #1, but processing is delayed until the user applica-
tion executes the ClkReadDatalink library function. This delay will vary de-
pending on the contents of the user application.
1. Noise may increase I/O delays.
1 cycle
Communications
cycle time
Data link
transmissions
(*)
Receive processing
3
(FinsGateway)
PC at node #2
User application
Section 8-3
I/O refresh
Data exchange
Computer at node #1

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