Supermicro C9Z390-PGW User Manual page 81

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Chapter 4: AMI BIOS
ODT RTT WR(CHA)
This feature controls ODT RTT WR(CHA). The options are Auto, 0, 80,
120, 240, and 255.
ODT RTT PARK(CHA)
This feature controls ODT RTT PARK(CHA). The options are Auto, 0, 34,
40, 48, 60, 80, 120, and 240.
ODT RTT NOM(CHA)
This feature controls ODT RTT NOM(CHA). The options are Auto, 0, 34,
40, 48, 60, 80, 120, and 240.
ODT RTT WR(CHB)
This feature controls ODT RTT WR(CHB). The options are Auto, 0, 80,
120, 240, and 255.
ODT RTT PARK(CHB)
This feature controls ODT RTT PARK(CHB). The options are Auto, 0, 34,
40, 48, 60, 80, 120, and 240.
ODT RTT NOM(CHB)
This feature controls ODT RTT NOM(CHB). The options are Auto, 0, 34,
40, 48, 60, 80, 120, and 240.
RcompTarget[RdOdt]
RcompTarget[WrDS]
RcompTarget[WrDSCmd]
RcompTarget[WrDSCtl]
RcompTarget[WrDSClk]
SCompDq StageDelayPS
SCompCmd StageDelayPS
SCompCtl StageDelayPS
SCompClk StageDelayPS
RTLatency_CH0_DIMM0
RTLatency_CH1_DIMM0
IOLatency_CH0_DIMM0
IOLatency_CH1_DIMM0
DllBwEn[0]
DllBwEn[1]
DllBwEn[2]
DllBwEn[3]
4-15

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