Avaya G350 Manager User Guide
Table 7-9. USP Configuration - Advanced Parameters (Continued)
Field
DTR
RTS
CTS
Invert Tx Clock
Ignore DCD
Transmitter Delay
Loopback
Description
The port's Data Terminal Ready status.
The port's Ready To Send status.
The port's Clear To Send status.
The state of the Tx clock. Possible states are:
• On - The Tx clock is inverted.
• Off - The Tx clock is not inverted.
The signal type monitored to determine the
interface's status. Possible values are:
• On - The interface monitors DSR/CTS
signals and ignores DCD signals.
• Off - The interface monitors DCD signals.
The delay between the CTS signal and the
beginning of transmission.
The status of the DTE loopback. Possible values
are:
• On
• Off
WAN Configuration
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