Xerox Phaser 3450 Service Manual page 19

4.2.1.1 SPGPm Internal Block Diagram
ROM
CONTROLLER
ADDR/
DATA
MUX
IO
CONTROLLER
PVC
HPVC
512x8
4096x16
UART(3CH)
ENGINE
CONTROLLER
LSU I/F
PULSE WIDTH
MODULATOR
MOT OR
CONTROLLER
128x16 x2
ADC (3CH)
PARALLEL PORT
INTERFACE
MISC
CONTROLLER
EPI
ENGINE
Comm. I/F
INTERRUPT
CTRL (5CH)
TIME CONTROL
UNIT
ARM946E -S CORE
EXTERNAL
16KB ICACHE
DMA CONTROLLER
16KB DCACHE
(4CH)
AHB BUS
MAC
SFR BUS
INTERFACE
SYSMAC
SYSTEM BUS
ARBITER
Summary of product
USB2.0
DECODER
SYSTEM
BUS
INTERFACE
CLOCK & RESET
GENERATOR
SYSTEM PLL
(120MHz)
SDRAM
CONTROLLER
(5CH)
HCT
gCODEC
GRAPHIC
EXECUTION
UNIT
ROTATOR/
SCALER/
HALFTONER
1024x8, 256x8x 4
Service Manual
ARBITER
4-7