E8363B And E8364B Overall Block Diagram, Includes Option Unl - Agilent Technologies E8362B Service Manual

Pna series microwave network analyzers
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E8363B and E8364B Overall Block Diagram
(Includes Option UNL and 016)
A1
A2
KEYPAD
DISPLAY
Service Guide: E8364-90026
USB
REAR PANEL
USB
INTERCONNECTS
HUB
DISPLAY
A15 CPU
PROCESSOR
FLASH
USB
USB
INTERFACE
RAM
RS-232 PORT
RS-232
INTERFACE
A3 FRONT PANEL INTERFACE
EEPROM
PARALLEL PORT
PARALLEL
INTERFACE
PCI BUS
MAIN
CPU
GPIB
GPIB PORT
INTERFACE
ROM
RAM
10/100 BASE-T
LAN
ETHERNET
A4
VGA
VIDEO PROCESSOR
POWER
VGA
LINE IN
INTERFACE
SUPPLY
VIDEO RAM
A41 HARD
A14 SYSTEM
DISK DRIVE
MOTHERBOARD
POWER BUS
USB
USB x 4
INTERFACE
A10 FREQUENCY REFERENCE
10 MHz
W33
J2
200 Hz
211
EXT REF IN
10 MHz
B0
1.0416 MHz
96
100 MHz
212
215
ƒ
2
5
10 MHz
HIGH STAB
12
OCXO
8.333 MHz
B1-25
DAC
B1 - 25
2nd LO x4
500 kHz
99.50 MHz
33.1667 MHz
L
10 MHz
218
W34
20
ƒ
I
R
3
J3
EXT REF OUT
217
214
J4
10 MHz
5 MHz
REF
5 MHz
B0
J10
4 MHz
200 Hz
2
213
TO A9
J11
(OPTION
080)
PHASE LOCK REF
J12
N/C
20 MHz
5
20 MHz
REF
216
J5
W31
W32
J5
A11 PHASE LOCK
40 MHz
COUNTER
20 MHz 15 MHz
B1 - 25
700 kHz
8.333 MHz
16.667 MHz
J6
ƒ
6 MHz
312
314
316
B0
311
AQUIRE: ON
NC
DELAY COMP
313
NC
RAMP CAL
317
315
318
GND
2.5 GHz OFFSET
20 MHz
LOCAL
PRETUNE: 30 kHz
REF IN
DIGITAL PRETUNE RAMP
DIGITAL
SWEEP: 100 Hz
BUS
ANALOG RAMP
POWER
BUS
L.O.
Harmonic
A8 Frac-N
A17
A20 LODA
A12
A21
Band
Number
Synthesizer
LOMA 10
(L.O.)
Source 20
SOMA 50
(N)
Frequency
Frequency
Frequency
Frequency
Frequency
(GHz)
(GHz)
(GHz)
(GHz)
(GHz)
0
1
0.011 to 0.046 0.011 to 0.046 0.011 to 0.046 0.010 to 0.045 0.010 to 0.045
1
1
0.053 to 0.756 0.053 to 0.756 0.053 to 0.756 0.045 to 0.748 0.045 to 0.748
2
1
0.756 to 1.508 0.756 to 1.508 0.756 to 1.508 0.748 to 1.500 0.748 to 1.500
3
1
1.50 to 3.00
1.50 to 3.00
1.50 to 3.00
1.50 to 3.00
1.50 to 3.00
4
1
1.50 to 1.90
3.00 to 3.80
3.00 to 3.80
3.00 to 3.80
3.00 to 3.80
5
1
1.90 to 2.25
3.80 to 4.50
3.80 to 4.50
3.80 to 4.50
3.80 to 4.50
6
1
2.25 to 2.40
4.50 to 4.80
4.50 to 4.80
4.50 to 4.80
4.50 to 4.80
7
1
2.40 to 3.00
4.80 to 6.00
4.80 to 6.00
4.80 to 6.00
4.80 to 6.00
8
1
1.50 to 1.60
6.00 to 6.40
6.00 to 6.40
6.00 to 6.40
6.00 to 6.40
9
1
1.60 to 1.90
6.40 to 7.60
6.40 to 7.60
6.40 to 7.60
6.40 to 7.60
10
1
1.90 to 2.50
7.60 to 10.00
7.60 to 10.00
7.60 to 10.00
7.60 to 10.00
11
1
2.50 to 3.00
5.00 to 6.00 10.00 to 12.00 10.00 to 12.00 10.00 to 12.00
12
1
1.50 to 1.60
6.00 to 6.40 12.00 to 12.80 12.00 to 12.80 12.00 to 12.80
13
1
1.60 to 1.90
6.40 to 7.60 12.80 to 15.20 12.80 to 15.20 12.80 to 15.20
14
1
1.90 to 2.00
7.60 to 8.00 15.20 to 16.00 15.20 to 16.00 15.20 to 16.00
15
1
2.00 to 2.50
8.00 to 10.00 16.00 to 20.00 16.00 to 20.00 16.00 to 20.00
16
3
1.67 to 1.90
6.67 to 7.60
6.67 to 7.60 10.00 to 11.40 20.00 to 22.80
17
3
1.90 to 2.13
7.60 to 8.53
7.60 to 8.53 11.40 to 12.80 22.80 to 25.60
18
3
2.13 to 2.50
8.53 to 10.00
8.53 to 10.00 12.80 to 15.00 25.60 to 30.00
19
3
2.50 to 2.67
5.00 to 5.33 10.00 to 10.67 15.00 to 16.00 30.00 to 32.00
20
3
2.67 to 3.00
5.33 to 6.00 10.67 to 12.00 16.00 to 18.00 32.00 to 36.00
21
3
1.50 to 1.60
6.00 to 6.40 12.00 to 12.80 18.00 to 19.20 36.00 to 38.40
22
3
1.60 to 1.67
6.40 to 6.67 12.80 to 13.33 19.20 to 20.00 38.40 to 40.00
23
3
1.67 to 1.90
6.67 to 7.60 13.33 to 15.20 10.00 to 11.40 40.00 to 45.60
24
3
1.90 to 2.00
7.60 to 8.00 15.20 to 16.00 11.40 to 12.00 45.60 to 48.00
25
3
2.00 to 2.08
8.00 to 8.33 16.00 to 16.67 12.00 to 12.50 48.00 to 50.00
Note: Bands 23–25 apply to E8364B only.
A16 TEST SET
PORT 1
MOTHERBOARD
BIAS
INPUT
DC BIAS 1
PORT 2
BIAS
INPUT
DC BIAS 2
POWER
BUS
TO
TRIGGER OUT
TRIGGER OUT
A35, A17, A18, A20,
A22, A36, A37
TRIGGER IN
LOCAL
DIGITAL BUS
AUX O
I
AUX O
I
INTERFACE
TEST SET IO
TEST SET O
I
INTERFACE
HANDLER O
I
HANDLER O
I
INTERFACE
s1
m250blk
PROBE
CONNECTORS
PROBE
INVERTER
POWER
A6 SIGNAL PROCESSING
POWER
ADC MODULE (SPAM)
300 kHz
ADC
SPEAKER
300 kHz
ADC
PCI
BRIDGE
300 kHz
ADC
DSP
A40 FLOPPY
300 kHz
DISK DRIVE
RAM
ADC
IF Calibration
Signal
LOCAL DIGITAL BUS
TO A8, A9, A11, A12, A16
HIGH DENSITY DATA BUS
POWER BUS
LOCAL DIGITAL BUS
MIXED POWER AND CONTROL SIGNALS
SERIAL TEST BUS NODES
Bx = ACTIVE SOURCE BAND
A8 FRACTIONAL-N SYNTHESIZER
A17 L.O.
MULTIPLIER/AMPLIFIER
B3-25
BIAS/RF
1
ALC
1.5 - 3.0 GHz
LOCAL
VCO
416
3 GHz
DIGITAL BUS
413
412
1.5 GHz
B2
B2-25
W19
2
B2-25
B0-3
POWER
J106
BUS
B0-1
1 GHz
FRAC-N
B0-1
W20
LOGIC
B0-1
B4-25
5 MHz REF
J105
J101
2250 MHz
VCO
415
417
2.4 GHz
750 MHz
1V/GHz
L
(TO A12, A16)
R
I
FRAC-N
ALC
LOGIC
414
418
Level
Adjust
411
+5V REF
FROM
FROM
FROM
A16
A16
A16
A12 SOURCE 20
LOCAL
DIGITAL BUS
SOURCE 10
POWER
BUS
5.25 GHz
11 GHz
TO A13
(OPTION 080)
FM
8.0 GHz
YTO
B4-25
3-10 GHz
B4-25
YTO TUNE
B0-3
117
B0-3
3 GHz
R
ALC
I
L
113
112
3.8 GHz
SLOPE
COMPENSATION
PMYO
114
1V/GHz
111
3.8 GHz
118
(FROM A11)
115
DAC
TEMP COMP
116
POWER DAC
DAC
A35 RECEIVER MOTHERBOARD
W25
J3
A
J4
W26
R1
To
A
2nd LO
a
Phase Lock
A31 RECEIVER A
W27
J5
8.333 MHz
L
R2
I
R
B1-25
J6
W28
B0
41.667
90°
I
R
kHz
L
B
1.0416 MHz
2nd LO
b
To
Phase Lock R1
2nd LO
a
A32 RECEIVER R1
8.333 MHz
L
I
R
B1-25
B0
41.667
90°
I
R
L
kHz
1.0416 MHz
2nd LO
b
To
Phase Lock R2
2nd LO
a
A33 RECEIVER R2
8.333 MHz
L
I
R
B1-25
B0
41.667
90°
I
R
L
kHz
To 2nd LO
a
x 4
1.0416 MHz
B0 1.000 MHz
B1 - 25 8.29167 MHz
2nd LO
b
W29
J2
4
To 2nd LO
x 4
To
b
B
2nd LO a
Phase Lock
B0 1.000 MHz
9
B1 - 25 8.29167 MHz
9
A34 RECEIVER B
8.333 MHz
L
I
R
A
B1-25
W30
J50
R1
PHASE
PHASE
LOCK
LOCK
B0
41.667
90°
I
MUX
R2
R
MUX
L
kHz
B
1.0416 MHz
2nd LO b
J502
FROM A13
(OPTION 080)
10 (LOMA 10)
LOMA10
2
11 GHz
W18
3.0 - 3.8 GHz
3.8 - 4.8 GHz
B4 - 7, 11, 19 - 20
X2
X2
6.0 - 7.6 GHz
B8 -10, 12 - 18, 21 - 25
4.8 - 6.0 GHz
X2
7.6 - 10.0 GHz
A16 TEST SET MOTHERBOARD
A21 SOURCE MULTIPLIER/
AMPLIFIER 50 (SOMA 50)
4
B16-25
W1
B0-15
0.01-20 GHz
MULTIPLIER/AMPLIFIER 20 (MA 20)
R1
R2
11 GHz
B0-10
23 GHz
B11-25
15 GHz
10.0-12.8 GHz
12.8 - 16.0 GHz
X2
16.0 - 20.0 GHz
LO REJECT
MIXER BIAS
FILTER
A27 A FIRST
LO
CONVERTER
(MIXER)
B0-15
1.3 MHz
+ 15 dB
B0
40 MHz
W41
W21
IF
L
L
I
I
R
R
+ 15 dB
B0 = 1.0416 MHz
B1 - 25 = 8.333 MHz
B16-25
B1 - 25
A28 R1
FIRST
LO
CONVERTER
(MIXER)
B0-15
7 MHz
B0
+ 15 dB
40 MHz
W42
W22
IF
L
L
I
I
R
R
+ 15 dB
B0 = 1.0416 MHz
B1 - 25 = 8.333 MHz
B16-25
B1 - 25
LO
A29 R2
FIRST
CONVERTER
(MIXER)
B0-15
7 MHz
B0
+ 15 dB
+ 15 dB
40 MHz
W43
W23
IF
L
I
R
+ 15 dB
+ 15 dB
B0 = 1.0416 MHz
B1 - 25 = 8.333 MHz
B1 - 25
B16-25
A30 B
FIRST
LO
CONVERTER
(MIXER)
B0-15
1.3 MHz
B0
+ 15 dB
40 MHz
W44
W24
IF
L
I
R
+ 15 dB
B0 = 1.0416 MHz
B1 - 25 = 8.333 MHz
B16-25
B1 - 25
W36
FROM
FROM
A16
FROM A16
A16
A18 MULTIPLIER/AMPLIFIER
A19 SPLITTER
MULTIPLIER/AMPLIFIER 20 (MA 20)
W15
11 GHz
B0-10, 16 - 18
23 GHz
0.01-20
W17
W17
W17
GHz
B11 - 15, 19 - 25
W16
10.0-12.8 GHz
15.0 GHz
12.8 - 16.0 GHz
X2
16.0 - 20.0 GHz
516
511
-15V REF
517
FROM
+9V REF
FROM
A16
A16
518
+15V REF
A22 SWITCH
SPLITTER
E8364B ONLY
40-50 GHz
5
X2
50
20.0-25.6 GHz
B23-25
W2
50
45 GHz
25.6-32.0 GHz
X2
32.0-40.0 GHz
B16-22
SOMA 50 SOURCE ALC
817
DRIVE
711
BREAKPOINT 1
W39
712
BREAKPOINT 2
FROM
714
617
OFFSET
A16
611
R1
R1
R1
LOG AMP
612
R2
R2
R2
614
716
1V/GHz
(FROM A11)
615
717
613
TEMP COMP
616
SLOPE COMP
718
618
PRELEVEL DAC
POWER DAC
715
+10V REF
MA 20 LO ALC
811
-10V REF
512
812
POWER DAC
+1.78V BIAS REF
513
814
TO
+10V REF
A18
713
514
1V/GHz
815
-1.25V BIAS REF
(FROM A11)
816
+5V REF
515
813
SLOPE COMP
PHASE LOCK IF DET
818
DET VOLTAGE OUT
RF
RF
OPTION 016
A43 STEP
ATTEN
W47
W45
TO
FROM
A27
A25
0-35 dB
FROM
A16
RF
RF
RF
W40
W14
RF
OPTION 016
A44 STEP
ATTEN
W48
W46
TO
FROM
A30
A26
0-35 dB
FROM
A16
3
A20 L.O.
DISTRIBUTION
ASSY (
LODA)
W11
A
W12
R1
W13
R2
W14
B
FROM
A16
A23 DETECTOR
W3
W7
W37
A24 DETECTOR
W4
W8
W38
A25
TEST PORT
COUPLER
W5
PORT 1
OPTION UNL
DC BIAS 1
A36 STEP
A38
W9
ATTEN
BIAS TEE
W51
W53
W55
0-60 dB
FROM
A16
A26
TEST PORT
COUPLER
W6
PORT 2
OPTION UNL
DC BIAS 2
A37 STEP
A39
ATTEN
BIAS TEE
W10
W52
W54
W56
0-60 dB
FROM
FROM
FROM
A16
A16
A16

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