Bit Logic Instructions With Parenthetical Expressions, Continued - Siemens CPU 412-1 Instruction Manual

Bit Logic Instructions with Parenthetical Expressions, continued

Address
In-
ID
struc- struc-
tion tion
) Right parenthesis, removing an
entry from the nesting stack.
Statusword for: )
Instruction evaluates:
Instruction affects:
S7-400 Instruction List
A5E00267845-01
Length
Description
in in
Words
BR CC1
– –
– –
Bit Logic Instructions with Parenthetical Expressions
Execution Time in ms
CPU 412 CPU 414
1 0.1 0.06
CC0 OV OS
– – –
– – –
CPU 416 CPU 417
0.04 0.03
OR STA RLO
– – Yes
Yes 1 Yes
/FC
–
1
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