Logic Instructions With Timers And Counters - Siemens CPU 412-1 Instruction Manual

Logic Instructions with Timers and Counters

Examining the status of the addressed timer/counter and gating the result with the RLO according to the appropriate logic function.
In- In-
struc- struc-
Address ID
tion
A/AN AND/AND NOT
T f Timer
T [e] Timer, memory-indirect addressing
C f Counter
C [e] Counter, memory-indirect addressing
Timerpara. Timer/counter (addressing via param-
Counter para. eter)
Status word for: A, AN
Instruction evaluates:
Instruction affects:
+ Plus time required for loading the address of the instruction (see page 20)
)
* With direct instruction addressing ;Address area 0 to 255
S7-400 Instruction List
A5E00267845-01
Length
Words Words
Description
BR CC1
– –
– –
Logic Instructions with Timers and Counters
Execution Time in ms Execution Time in ms
in in
CPU 412 CPU 414
1*/2 0.1/0.125 0.06/0.075
2 0.1+ 0.06+
1*/2 0.1/0.125 0.06/0.075
2 0.1+ 0.06+
2 0.1+ 0.06+
0.1+ 0.06+
CC0 OV OS
– – –
– – –
CPU 416 CPU 417
0.04/0.05 0.03/0.042
0.04+ 0.03+
0.04/0.05 0.03/0.042
0.04+ 0.03+
0.04+ 0.03+
0.04+ 0.03+
OR STA RLO
Yes – Yes
Yes Yes Yes
/FC
Yes
1
31