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Siemens CPU 412-1 Instruction Manual Page 51

S7-400; cpu 412 series; cpu 414 series; cpu 416 series; cpu 417 series;.
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Load Instructions, continued
If the used address is divisible by 4without a remainder, the execution times for instructions specified on this page is doubled.
In-
In-
Address
Address
struc-
struc-
ID
tion
L
Load ...
IDa
Input double word
QD
a
Output double word
PID
a
Peripheral input double word
MD
a
Bit memory double word
LD
a
Local data double word
DBD
a
Data double word
DID
a
Instance data double word
... in ACCU1
i [d]
Memory-indirect, area internal
i [AR1,m]
Register-ind., area internal (AR1)
i [AR2,m]
Register-ind., area internal (AR2)
D[AR1,m]
Area-crossing (AR1)
D[AR2,m]
Area-crossing (AR2)
Parameter
Via parameter
+
Plus time required for loading the address of the instruction (see page 20)
1)
With indirect instruction addressing; Address area 0 to 127
The following peripheral acknowledgement time must be observed with CPU 414-4H and CPU 417-4H: solo xx ms, redundant xx ms
2)
3)
With direct instruction addressing; Address area 0 to 255
4)
I, Q, P, M, L / DB, DI
S7-400 Instruction List
A5E00267845-01
Length
Length
Description
Description
Words
1
1
2)
1
1
4)
4)
4)
4)
4)
4)
Execution Time in ms
Execution Time in ms
in
in
CPU 412
CPU 414
1)
/2
0.1/0.125
0.06/0.075
1)
/2
0.1/0.125
0.06/0.075
1)
/2
0.1/0.125
0.06/0.075
3)
/2
0.1/0.125
0.06/0.075
2
0.125
0.075
2
0.2
0.12
2
0.2
0.12
2
0.1+/0.2+
0.06+/0.12+
2
0.125+/0.2+
0.075+/0.12+
2
0.125+/0.2+
0.075+/0.12+
2
0.125+/0.2+
0.075+/0.12+
2
0.125+/0.2+
0.075+/0.12+
2
0.125+/0.2+
0.075+/0.12+
Load Instructions
CPU 416
CPU 417
0.04/0.05
0.03/0.042
0.04/0.05
0.03/0.042
0.04/0.05
0.03/0.042
0.04/0.05
0.03/0.042
0.05
0.042
0.08
0.09
0.08
0.09
0.04+/0.08+
0.03+/0.09+
0.05+/0.08+
0.042+/0.09+
0.05+/0.08+
0.042+/0.09+
0.05+/0.08+
0.042+/0.09+
0.05+/0.08+
0.042+/0.09+
0.05+/0.08+
0.042+/0.09+
49

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