Evaluating Conditions Using AND, OR and EXCLUSIVE OR
All logic instructions generate a result (new RLO). The first instruction in a logic string generates the new RLO from the signal state
scanned. The subsequent logic instructions generate the new RL from the signal state scanned and the old RLO. The logic string ends with
an instruction which limits the RLO (e.g. a memory instruction); that is, the FC bit is set to zero.
Instruc-
Instruc-
Address
Address
tion
ID
A/AN
AND/AND NOT
O/ON
OR/OR-NOT
X/XN
EXCLUSIVE OR/ EXCLUSIVE-OR-NOT
Result=0
==0
(A1=0 and A0=0)
>0
Result>0
(CC1=1 and CC0=0)
<0
Result<0
(CC1=0 and CC0=1)
<>0
Result00
((CC1=0 and CC0=1) or (CC1=1 and
CC0=0))
Status word for:
A/AN/O/ON/X/XN
Instruction evaluates:
Instruction affects:
S7-400 Instruction List
A5E00267845-01
Evaluating Conditions Using AND, OR and EXCLUSIVE OR
Description
Description
BR
CC1
–
Yes
–
–
Execution Time in ms
Length
Length
in
in
CPU 412
CPU 414
Words
1
0.1
0.06
1
0.1
0.06
1
0.1
0.06
1
0.1
0.06
CC0
OV
OS
Yes
–
–
–
–
–
CPU 416
CPU 417
0.04
0.03
0.04
0.03
0.04
0.03
0.04
0.03
OR
STA
RLO
Yes
–
Yes
Yes
Yes
Yes
/FC
Yes
1
35