Siemens CPU 412-1 Instruction Manual page 50

Load Instructions, continued
If there is a remainder of 3 following an integral division of the used addresses by 4, the execution times for instructions specified on this
page are doubled.
In- In-
Address Address
struc- struc-
ID
tion
L Load ...
IW a Input word
QW Output word
PIW a Peripheral input word
MW a Bit memory word
LW a Local data word
DBW a Data word
DIW a Instance data word
... into ACCU1-L
h [d] Memory-indirect, area-internal
h [AR1,m] Register-indirect, area-internal (AR1)
h [AR2,m] Register-indirect, area-internal (AR2)
W[AR1,m] Area-crossing (AR1)
W[AR2,m] Area-crossing (AR2)
Parameter Via parameter
+ Plus time required for loading the address of the instruction (see page 20)
1)
With indirect instruction addressing; Address area 0 to 127
The following peripheral acknowledgement time must be observed with CPU 414-4H and CPU 417-4H: solo xx ms, redundant xx ms
2)
3)
With direct instruction addressing; Address area 0 to 255
4)
I, Q, P, M, L / DB, DI
S7-400 Instruction List
A5E00267845-01
Length Length
Description Description
2)
4)
4)
4)
4)
4)
4)
Execution Time in ms Execution Time in ms
in in
CPU 412 CPU 414
Words
1)
1 /2 0.1/0.125 0.06/0.075
1)
1 /2 0.1/0.125 0.06/0.075
1)
1 /2 0.1/0.125 0.06/0.075
3)
1 /2 0.1/0.125 0.06/0.075
2 0.125 0.075
2 0.2
2 0.2
2 0.1+/0.2+ 0.06+/0.12+
2 0.125+/0.2+ 0.075+/0.12+
2 0.125+/0.2+ 0.075+/0.12+
2 0.125+/0.2+ 0.075+/0.12+
2 0.125+/0.2+ 0.075+/0.12+
2 0.125+/0.2+ 0.075+/0.12+
Load Instructions
CPU 416 CPU 417
0.04/0.05 0.03/0.042
0.04/0.05 0.03/0.042
0.04/0.05 0.03/0.042
0.04/0.05 0.03/0.042
0.05
0.12 0.08
0.12 0.08
0.04+/0.08+ 0.03+/0.09+
0.05+/0.08+ 0.042+/0.09+
0.05+/0.08+ 0.042+/0.09+
0.05+/0.08+ 0.042+/0.09+
0.05+/0.08+ 0.042+/0.09+
0.05+/0.08+ 0.042+/0.09+
0.042
0.09
0.09
48