YASKAWA VIPA System 300S+ Manual page 58

Deployment CPU 317-4PN23
Setting VIPA specific CPU parameters > VIPA specific parameters
5.10.2.1 Function RS485 X3
5.10.2.1.1 Synchronization between master system and CPU
Overview
PROFIBUS DP SyncInOut
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Using this parameter the RS485 interface may be switched to PtP communication (point
to point) respectively the synchronization between DP master system and CPU may be
set:
Deactivated
PtP
PROFIBUS DP async
PROFIBUS DP syncIn
PROFIBUS DP syncOut
PROFIBUS DP syncInOut
Default: PROFIBUS DP async
Normally the cycles of CPU and DP master run independently. The cycle time of the CPU
is the time needed for one OB1 cycle and for reading respectively writing the inputs
respectively outputs. The cycle time of a DP master depends among others on the
number of connected slaves and the baud rate, thus every plugged DP master has its
own cycle time. Due to the asynchronism of CPU and DP master the whole system gets
relatively high response times. The synchronization behavior between every VIPA
PROFIBUS DP master and the CPU may be configured by means of a hardware configu-
ration as shown above. The different modes for the synchronization are in the following
described.
In PROFIBUS DP SyncInOut mode CPU and DP master system are waiting on each
other and form thereby a cycle. Here the whole cycle is the sum of the longest DP master
cycle and CPU cycle. By this synchronization mode you receive global consistent in-/
output data, since within the total cycle the same input and output data are handled suc-
cessively by CPU and DP master system. If necessary the time of the Watchdog of the
bus parameters should be increased at this mode.
VIPA System 300S
Deactivates the RS485 interface.
With this operating mode the PROFIBUS
DP master is deactivated and the RS485
interface acts as an interface for serial
point-to-point communication. Here data
may be exchanged between two stations
by means of protocols.
PROFIBUS DP master operation asyn-
chronous to CPU cycle The RS485 inter-
face is preset at default to PROFIBUS DP
async. Here CPU cycle and cycles of
every VIPA PROFIBUS DP master run
independently.
The CPU is waiting for DP master input
data.
The DP master system is waiting for CPU
output data.
CPU and DP master system are waiting on
each other and form thereby a cycle.
HB140 | CPU | 317-4PN23 | en | 18-01
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