YASKAWA VIPA System 300S+ Manual page 54

Deployment CPU 317-4PN23
Setting standard CPU parameters > Parameters CPU
Retentive Memory
Interrupts
Time-of-day interrupts
Cyclic interrupts
54
The selected memory byte cannot be used for temporary data storage.
n Number of Memory bytes from MB0
– Enter the number of retentive memory bytes from memory byte 0 onwards.
n Number of S7 Timers from T0
– Enter the number of retentive S7 timers from T0 onwards. Each S7 timer occu-
pies 2bytes.
n Number of S7 Counters from C0
– Enter the number of retentive S7 counter from C0 onwards.
n Areas
– This parameter is not supported.
Priority
n
– Here the priorities are displayed, according to which the hardware interrupt OBs
are processed (hardware interrupt, time-delay interrupt, async. error interrupts).
n Priority
– This value is fixed to 2.
n Active
– By enabling 'Active' the time-of-day interrupt function is enabled.
n Execution
– Select how often the interrupts are to be triggered.
– Intervals ranging from every minute to yearly are available. The intervals apply to
the settings made for start date and time.
n Start date/time
– Enter date and time of the first execution of the time-of-day interrupt.
n Process image partition
– This parameter is not supported.
n Priority
– Here the priorities may be specified according to which the corresponding cyclic
interrupt is processed.
– With priority "0" the corresponding interrupt is deactivated.
Execution
n
– Enter the time intervals in ms, in which the watchdog interrupt OBs should be pro-
cessed.
– The start time for the clock is when the operating mode switch is moved from
STOP to RUN.
n Phase offset
– Enter the delay time in ms for current execution for the watch dog interrupt. This
should be performed if several watchdog interrupts are enabled.
– Phase offset allows to distribute processing time for watchdog interrupts across
the cycle.
n Process image partition
– This parameter is not supported.
VIPA System 300S
HB140 | CPU | 317-4PN23 | en | 18-01
+