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3.2
Pin Assignment (Overview)
Ball
Pin
Signal Name
BGA
QFP
AB8
A1
48
SPI_SCK / I2C_SCK
XREADY / XDTACK
A2
47
SPI_MISO / I2C_SDA
A3
7
GND
A4
6
VCC
AB3
A5
38
I2C_SA3
AB2
A6
37
I2C_SA2
AB7
B1
1
SPI_MOSI
AB5
B2
46
I2C_SA5
AB9
B3
44
SPI_CPHA
AB4
B4
41
I2C_SA4
AB1
B5
39
I2C_SA1
AB0
B6
36
I2C_SA0
XCS
C1
3
SPI_XSS
AB10
C2
2
SPI_CPOL
AB6
C3
45
I2C_SA6
C4
40
SYNC
C5
35
ALE /AS / AB11
C6
34
XRD / R_W
D1
18
VCC
D2
5
XTEST0
D3
4
DIVIDER
D4
33
MODE
VPC3+S User Manual
Copyright © profichip GmbH, 2012
In/Out
Description
Address Bus 8
I(S)
SPI: Serial Clock / I2C: Serial Clock
READY / DTACK for external CPU
I(S)/O
SPI: Master-In-Slave-Out / I2C: Serial Data
Address Bus 3
I
I2C: Slave Address 3
Address Bus 2
I
I2C: Slave Address 2
Address Bus 7
I(S)
SPI: Master-Out-Slave-In
Address Bus 5
I
I2C: Slave Address 5
Address Bus 9
I
SPI: Clock Phase
Address Bus 4
I
I2C: Slave Address 4
Address Bus 1
I
I2C: Slave Address 1
Address Bus 0
I
I2C: Slave Address 0
Chip-Select
I
SPI: Slave-Select
Address Bus 10
I
SPI: Clock Polarity
Address Bus 6
I
I2C: Slave Address 6
O
Synchronization Pulse
Address Latch Enable / Address Strobe /
I
Address Bus 11
I
Read / Read-Write
I
Test Pin 0 (to be connected to VCC)
Divider setting for CLKOUT: '0': 12 MHz
I
'0': Asynchronous Mode (Parallel Interface Mode)
'1': Synchronous Mode (Parallel Interface Mode)
I
'0': SPI (Serial Interface Mode)
'1': I2C (Serial Interface Mode)
Revision 1.04
Pin Description 3
Source / Destination
CPU
CPU
CPU
Configuration Pin
CPU
Configuration Pin
CPU
Configuration Pin
CPU
Configuration Pin
CPU
Configuration Pin
CPU
Configuration Pin
CPU
Configuration Pin
CPU
Configuration Pin
CPU
CPU
Configuration Pin
CPU
Configuration Pin
CPU / Motion Control
CPU
CPU
Test Pin
Configuration Pin
'1': 24 MHz
Configuration Pin
11
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