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8 Hardware Interface
8.1.7
Application with 80C32 (4K Byte RAM Mode)
µC
µC
µC
µC
connect to VDD or GND
AB(15..8)
µC
Figure 8-25: 80C32 Application in 4K Byte mode
The internal chipselect is activated when the address inputs AB[10..3] of
the VPC3+S are set to '0'.
In the example above the start address of the VPC3+S is set to 2000H.
Figure 8-26 : Internal Chipselect Generation in Synchronous Intel Mode, 4K Byte RAM
106
VPC3+
5
CLK
48 MHz
8
GND
XINT/MOT
1K
36
RESET
23
VDD
MODE
3K3
24
ALE
XWR
2
XWR
XRD
4
XRD
34
XTEST0
VDD
3K3
35
XTEST1
VDD
3K3
3
DIVIDER
44
AB8
AB0
43
AB9
AB1
41
AB10
AB2
1
AB11
XCS/AB11
AB12
40
AB3
AB13
37
1
AB4
AB14
42
AB5
32
AB15
AB6
31
AB7
1K
29
AB8
1K
25
AB9
1K
10
GND
AB10
1K
Processor
ALE
8
AD[7..0]
3
AB[10..8]
AB[11]
4
AB[15..12]
Revision 1.04
7
CLK2
13
XDATAEX
14
XREADY
9
X/INT
33
XCTS
30
RXD
27
RTS
26
TXD
11
DB0
12
DB1
15
DB2
16
DB3
19
DB4
20
DB5
21
DB6
22
DB7
VPC3+ B
ALE
DB[7..0]
address
latch
AB[2..0]
XCS/A11
AB[6..3]
8
CS
decoder
4
AB[10..7]
all bits
zero
Copyright © profichip GmbH, 2012
LED for Data_Exchange
µC
GND
1K
RS485
RS485
RS485
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
µC
DB(7..0)
8
12
4.0 KB
internal address
RAM
1
internal chip
select
VPC3+S User Manual
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