ADLINK Technology NuDAQ PCI-9810 User Manual page 67

trig_src:
trig_pol:
trig_lvl:
post_trig_cnt:
@ Return Code
PCICardNumErr
PCICardNotInit
InvalidClkDiv
NoError
C/C++ Library
Selected trigger source, the valid trigger
sources are:
CH0_TRIG: Channel 0
CH1_TRIG: Channel 1
CH2_TRIG: Channel 2
CH3_TRIG: Channel 3
AUX_TRIG: External digital trigger
Trigger slope.
0: Positive slope trigger
1: Negative slope trigger
Trigger level. The relationship between the
8-bit trigger level and the trigger voltage is
shown in section 4.5.
Post trigger count. This value is preloaded
to the post trigger counter when the post
trigger counter register is written. It will
count down on the rising edge of ADC
sampling clock after the trigger condition is
met. When the count reaches 0, the
counter stops. The counter is used to
control the delay time in delay trigger mode
and to control the post trigger sampling
count in middle trigger mode.
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