User-Programmable Elements - GE B30 Instruction Manual

SPECIFICATIONS
Current supv. pickup:
Current supv. dropout:
Current supv. accuracy:
0.1 to 2.0 × CT rating:
above 2 × CT rating:
BREAKER ARCING CURRENT
Principle:
2
Initiation:
Compensation for auxiliary relays:
Alarm threshold:
Fault duration accuracy:
Availability:
BREAKER FLASHOVER
Operating quantity:
Pickup level voltage:
Dropout level voltage:
Pickup level current:
Dropout level current:
Level accuracy:
Pickup delay:
Timer accuracy:
Operate time:
BREAKER RESTRIKE
Principle:
Availability:
Pickup level:
Reset delay:
THERMAL OVERLOAD PROTECTION
Thermal overload curves:
Base current:
Overload (k) factor:
Trip time constant:
Reset time constant:
Minimum reset time:
Timer accuracy (cold curve):
Timer accuracy (hot curve):
TRIP BUS (TRIP WITHOUT FLEXLOGIC)
Number of elements:
Number of inputs:
Operate time:
Timer accuracy:

2.5.2 User-programmable elements

FLEXLOGIC
Programming language:
Lines of code:
Internal variables:
Supported operations:
2-22
0.020 to 30.000 pu in steps of 0.001
97 to 98% of pickup
±0.75% of reading or ±2% of rated (whichever is greater)
±2.5% of reading
2
accumulates breaker duty (I t) and measures fault duration
programmable per phase from any FlexLogic operand
0 to 65.535 s in steps of 0.001
2
0 to 50000 kA -cycle in steps of 1
0.25 of a power cycle
1 per CT bank with a minimum of 2
phase current, voltage, and voltage difference
0.004 to 1.500 pu in steps of 0.001
97 to 98% of pickup
0.020 to 1.500 pu in steps of 0.001
97 to 98% of pickup
±0.5% or ±0.1% of rated, whichever is greater
0 to 65.535 s in steps of 0.001
±3% of operate time or ±42 ms, whichever is greater
<42 ms at 1.10 × pickup at 60 Hz
detection of high-frequency overcurrent condition ¼ cycle after breaker opens
one per digital signal processor (DSP)
0.1 to 2.00 pu in steps of 0.01
0.000 to 65.535 s in steps of 0.001
IEC 255-8 curve
0.20 to 3.00 pu in steps of 0.01
1.00 to 1.20 pu in steps of 0.05
0 to 1000 min. in steps of 1
0 to 1000 min. in steps of 1
0 to 1000 min. in steps of 1
±100 ms or 2%, whichever is greater
±500 ms or 2%, whichever is greater for I
6
16
<2 ms at 60 Hz
±3% or 10 ms, whichever is greater
Reverse Polish Notation with graphical visualization (keypad programmable)
1024
64
NOT, XOR, OR (2 to 16 inputs), AND (2 to 16 inputs), NOR (2 to 16 inputs), NAND (2 to 16 inputs),
latch (reset-dominant), edge detectors, timers
CHAPTER 2: PRODUCT DESCRIPTION
< 0.9 × k × I and I / (k × I ) > 1.1
p b b
B30 BUS DIFFERENTIAL SYSTEM – INSTRUCTION MANUAL