NEC 78K0 User Manual page 94

(2) Port registers (P0 to P3, P6, P7, P12, and P13)
These registers write the data that is output from the chip when data is output from a port.
If the data is read in the input mode, the pin level is read. If it is read in the output mode, the value of the output
latch is read.
These registers can be set by a 1-bit or 8-bit memory manipulation instruction.
RESET input clears these registers to 00H (but P2 is undefined).
Symbol 7 6
P0 0 0
7 6
P1
P17 P16
7 6
P2
P27 P26
7 6
P3
0 0
7 6
P6
0 0
7 6
P7
0 0
7 6
P12 0 0
7 6
P13
0 0
Pmn
0 Output 0
1 Output 1
94
CHAPTER 4 PORT FUNCTIONS
Figure 4-17. Format of Port Register
5 4 3
0 0 0
5 4 3
P15 P14 P13
5 4 3
P25 P24 P23
5 4 3
0 0 P33
5 4 3
0 0 P63
5 4 3
0 0 P73
5 4 3
0 0 0
5 4 3
0 0 0
m = 0 to 3, 6, 7, 12, 13; n = 0 to 7
Output data control (in output mode)
User's Manual U16227EJ2V0UD
2 1 0 Address
0 P01 P00
2 1 0
P12 P11 P10
2 1 0
P22 P21 P20
2 1 0
P32 P31 P30
2 1 0
P62 P61 P60
2 1 0
P72 P71 P70
2 1 0
0 0 P120
2 1 0
0 0 P130
Input data read (in input mode)
Input low level
Input high level
After reset
FF00H 00H (output latch)
FF01H 00H (output latch)
FF02H Undefined
FF03H 00H (output latch)
FF06H 00H (output latch)
FF07H 00H (output latch)
FF0CH 00H (output latch)
FF0DH 00H (output latch)
R/W
R/W
R/W
R
R/W
R/W
R/W
R/W
R/W