NEC 78K0 User Manual page 366

(2) Low-voltage detection level selection register (LVIS)
This register selects the low-voltage detection level.
This register can be set by an 8-bit memory manipulation instruction.
RESET input clears LVIS to 00H.
Figure 21-3. Format of Low-Voltage Detection Level Selection Register (LVIS)
Address: FFBFH After reset: 00H
7
Symbol
0
LVIS
LVIS2
0
0
0
0
1
1
1
1
Notes 1. When the detection voltage of the POC circuit is specified as V
option, do not select V
selected, the POC circuit has priority.
2. This setting is prohibited in (A1) grade products and (A2) grade products.
Caution Be sure to clear bits 3 to 7 to 0.
366
CHAPTER 21 LOW-VOLTAGE DETECTOR
R/W
6 5 4
0 0 0
LVIS1 LVIS0
(4.3 V ±0.2 V)
0 0 V
LVI0
(4.1 V ±0.2 V)
0 1 V
LVI1
(3.9 V ±0.2 V)
1 0 V
LVI2
(3.7 V ±0.2 V)
1 1 V
LVI3
(3.5 V ±0.2 V)
0 0 V
LVI4
(3.3 V ±0.15 V)
0 1 V
LVI5
(3.1 V ±0.15 V)
1 0 V
LVI6
1 1 Setting prohibited
to V
LVI4
User's Manual U16227EJ2V0UD
3 2
0 LVIS2
Detection level
Note 1
Notes 1, 2
Notes 1, 2
as the LVI detection voltage. Even if V
LVI6
1 0
LVIS1 LVIS0
= 3.5 V ±0.2 V by a mask
POC
to V
LVI4 LVI6
are