Table Of Contents - NEC 78K0 User Manual

CHAPTER 1 OUTLINE ............................................................................................................................ 17
1.1 Features ...................................................................................................................................... 17
1.2 Applications................................................................................................................................ 18
1.3 Ordering Information ................................................................................................................. 19
1.4 Pin Configuration (Top View).................................................................................................... 21
1.5 K1 Family Lineup........................................................................................................................ 23
1.5.1 78K0/Kx1 product lineup................................................................................................................ 23
1.5.2 V850ES/Kx1 product lineup ........................................................................................................... 25
1.6 Block Diagram ............................................................................................................................ 27
1.7 Outline of Functions .................................................................................................................. 28
CHAPTER 2 PIN FUNCTIONS ............................................................................................................... 30
2.1 Pin Function List ........................................................................................................................ 30
2.2 Description of Pin Functions .................................................................................................... 33
2.2.1 P00 and P01 (port 0) ..................................................................................................................... 33
2.2.2 P10 to P17 (port 1) ........................................................................................................................ 34
2.2.3 P20 to P27 (port 2) ........................................................................................................................ 34
2.2.4 P30 to P33 (port 3) ........................................................................................................................ 35
2.2.5 P60 to P63 (port 6) ........................................................................................................................ 35
2.2.6 P70 to P73 (port 7) ........................................................................................................................ 35
2.2.7 P120 (port 12)................................................................................................................................ 36
2.2.8 P130 (port 13)................................................................................................................................ 36
2.2.9 AV ............................................................................................................................................. 36
REF
2.2.10 AV ............................................................................................................................................... 36
SS
2.2.11 RESET........................................................................................................................................... 36
2.2.12 X1 and X2 ...................................................................................................................................... 36
2.2.13 XT1 and XT2.................................................................................................................................. 36
2.2.14 V and EV
DD
2.2.15 V and EV
SS
2.2.16 V (flash memory versions only) .................................................................................................. 36
PP
2.2.17 IC (mask ROM versions only) ........................................................................................................ 37
2.3 Pin I/O Circuits and Recommended Connection of Unused Pins......................................... 38
CHAPTER 3 CPU ARCHITECTURE ...................................................................................................... 41
3.1 Memory Space ............................................................................................................................ 41
3.1.1 Internal program memory space .................................................................................................... 47
3.1.2 Internal data memory space .......................................................................................................... 48
3.1.3 Special function register (SFR) area.............................................................................................. 48
3.1.4 Data memory addressing............................................................................................................... 49
3.2 Processor Registers .................................................................................................................. 54
3.2.1 Control registers ............................................................................................................................ 54
3.2.2 General-purpose registers ............................................................................................................. 58
3.2.3 Special function registers (SFRs) .................................................................................................. 59
3.3 Instruction Address Addressing .............................................................................................. 63
3.3.1 Relative addressing ....................................................................................................................... 63
10
CONTENTS
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DD
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User's Manual U16227EJ2V0UD