NEC 78K0 User Manual page 231

(2) Power-fail detection function (when PFEN = 1)
By setting bit 7 (ADCS) of the A/D converter mode register (ADM) to 1 and bit 7 (PFEN) of the power-fail
comparison mode register (PFM) to 1, the A/D conversion operation of the voltage applied to the analog input pin
specified by the analog input channel specification register (ADS) is started.
When the A/D conversion has been completed, the result of the A/D conversion is stored in the A/D conversion
result register (ADCR), the values are compared with power-fail comparison threshold register (PFT), and an
interrupt request signal (INTAD) is generated under the condition specified by bit 6 (PFCM) of PFM.
<1> When PFEN = 1 and PFCM = 0
The higher 8 bits of ADCR and PFT values are compared when A/D conversion ends and INTAD is only
generated when the higher 8 bits of ADCR ≥ PFT.
<2> When PFEN = 1 and PFCM = 1
The higher 8 bits of ADCR and PFT values are compared when A/D conversion ends and INTAD is only
generated when the higher 8 bits of ADCR < PFT.
Figure 11-11. Power-Fail Detection (When PFEN = 1 and PFCM = 0)
A/D conversion
Higher 8 bits
of ADCR
PFT
INTAD
(PFEN = 1)
First conversion
Note If the conversion result is not read before the end of the next conversion after INTAD is output, the result is
replaced by the next conversion result.
Remark n = 0 to 7
CHAPTER 11 A/D CONVERTER
ANIn ANIn
80H
80H
Note
Condition match
User's Manual U16227EJ2V0UD
ANIn ANIn
7FH 80H
231