Amplitude Control; Offset Control; Multiplying Dac Functional Diagram - Wavetek 75 Instruction Manual

Arbitrary waveform
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gain of
-
0.8, changing the full scalewaveform to
+
2V.
For external waveforms applied to the Sum In input, U7
provides a gain of
-
0.4, converting a
?
5V waveform
to
+
2V. At the Sum In input, R34 provides a precision
50ohm termination for theexternal waveforrn.Thefuse,
F1, and the zener diodes, CR14 and CR15, protect
against excessive voltage. The resistance of the fuse
causes some gain error from the Sum In input and can
be replaced with a jumper if greater accuracy is required.
4.2.1.7
Amplitude Control
Refer to schematic 0103-00-1456, sheet 4. The
amplitude control circuit consists of a multiplying DAC
(U9) and an op amp (U8). The DAC has 12 bits of resolu-
tion but only 10 are used, so the 2 least significant (pins
14 and 15) are tied low. A simplified diagram of the DAC
is shown in figure 4-4. The DAC produces a voltage at
VOUT(pin 17) that is proportional to the binary number
applied to it's digital inputs (AMP1-AMP10) and the
voltage applied to VREF (pin 1 ).The waveform is applied
to the VREF input and is attenuated by the ratio of Dl1 024;
where D is the decimal equivalent of the binary number
at the digital inputs to the DAC. The waveform attenua-
tion at this point is typically over a 10.1 range; 100011 024
to 10011 024 while the output attenuator provides 3
separate decades of attenuation. The value of the peak
amplitude and offset as set by the user determine the
attenuator range selected by the microprocessor. The
microprocessor then programs the amplitude control to
the appropriate attenuation within the range. If the value
of the offset requires the output attenuator to be in the
range of least attenuation and the amplitude is set below
this range, the amplitude control can cover a range of
up to 1000:l. Because the waveform is bipolar, the power
supplies to the DAC are also bipolar. The positive supply
is
+
1 OVwith thedigitalground tied to
-
5V.This biases
the internal switches of the DAC at such a point that the
negative voltage swings of the waveform will not affect
them. The levels of the digital inputs are
-
5V for a logical
low and
+
5V for a logical high to properly control the
internal switches. This amplitude information originates
in the microprocessor and is interfaced to the amplitude
control by the control shift register (ref:schematic
01 03-00-1 456 sheet 2). The op amp, U8 acts as a buffer
for the DAC and has a gain of one.
4.2.1.8
Offset Control
Refer to schematic 01 03-00-1 456, sheet 4). The com-
ponentsof theoffset control circuit are a 12 bit multiply-
ing DAC (U5) and an op amp (U4). A simplified diagram
of the DAC is shown in figure 4-4. The DAC (U5) is the
same type used in the amplitude control circuit, but it
is configured here in the current output mode. This is
done by connecting a reference to the voltage output
"REF
RBlAS
AGND
DIGITAL
INPUTS
HIGH
Figure 4-4.
Multiplying DAC Functional Diagram
4-6
Scans by ArtekMedia O 2006

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