Waveform Synthesizer; Waveform Dac Functional Diagram - Wavetek 75 Instruction Manual

SYNCEN (U20A pin 3) low which turns off the clock to
the latches. SYNCEN is also used in theTrigger and Hold
logic to disable any external sync in pulses that may
occur during this time. As previously described, the
address counter is always one address past the current
waveform address. With the latches holding the current
waveform data, the microprocessor is free to manually
clock the waveform address counter from its present
address to the address of the current waveform data.
Once the current address is reached and its data read,
the microprocessor releases SYNCEN and manually
clocks the waveform memory and the latches through
the return to start ramp.
4.2.1.6 Waveform Synthesizer
Refer to schematic 01 03-00-1 456, sheet 4. The function
of the waveform synthesizer is toconvert the digital data
from the waveform memory to an analog voltage. The
main componentsof the waveform synthesizer are a 12
bit digital to analog converter (U2) and two operational
amplifiers (U6 and U7). A simplified diagram of the
waveform DAC is shown in figure 4-3. The DAC (digital
to analog converter) sinks a current into the DAC OUT
(pin 9). That current is proportional to the binary number
appearing on it's digital inputs(WF1 -WFl2)and the cur-
rent applied to the reference input (pin 6). WF1 is the most
significant bit (MSB) and WF12 is the least significant
bit (LSB)of the binary waveform data. The reference cur-
rent isdetermined by the precision l O V reference at the
reference out (pin 4) applied to an internal reference
resistor connected to pin 6. The referencevoltage is also
applied to the internal bipolar offset resistor connected
to pin 8. This adds a constant current to the DAC OUT
equivalent to the half scale output current, thus causing
the net output current to be bipolar. Resistors R31 and
R32 are connected in series with the internal reference
and offset resistors. Their values are staggered to force
the zero output current condition to occur at a binary
code of 1 00000000000. The binary codes applied to the
DAC range from 000000000001 to 1 1 1 1 1 1 1 1 1 11 1. ' T he
op amp, U6 converts the output current of the DAC to
a voltage. The internal resistors connected to U2 pins
10 and 1 1 are used for feedback from U6. These resistors
are matched to the other resistors internal to the DAC,
thus ensuring good gain accuracy and temperature
tracking. The inverting input (pin 2) of the op amp acts
as a current summing node and is kept at virtual ground.
The output current of the DAC flows into the summing
node and through the 2.5kR feedback resistance to
create a voltage at U6 pin 6 whose full scale value is
+
2.5V.
The op amp U7 and the resistors in RN1 act as an
inverting summing amplifier for the internal and exter-
nal waveforms. For internal waveforms U7 provides a
REF IN
REF GNG
REF
0
"cc
BIPOLAR
OUT
R32 OFF
r----
- - - - - - -------
*
---------
- Q
8
REF
- +
-
.
-
-
10UT
=
4
X
lREF
X
CODE
I
CODE INPUT
b7
b" bZ4
----
-
'JEE
MSB
----
LSB
DIGITAL
GND
Figure 4-3. Waveform DAC Functional Diagram
- -
DAC
OUT
4-5
Scans by Artekhledia O 2006