Omron C200H Operation Manual page 361

Remote I/O Master Unit
Remote I/O Slave Unit
Remote I/O System
Remote I/O Unit
remote I/O word
reset
return
reversible counter
reversible shift register
right-hand instruction
rightmost (bit/word)
rotate register
RUN mode
scheduled interrupt
self diagnosis
self-maintaining bit
servicing
358
Glossary
The Unit in a Remote I/O System through which signals are sent to all other
Remote I/O Units. The Remote I/O Master Unit is mounted either to a CPU
Rack or an Expansion I/O Rack connected to the CPU Rack. Remote I/O
Master Unit is generally abbreviated to Master.
A Unit mounted to a Backplane to form a Slave Rack. Remote I/O Slave Unit
is generally abbreviated to Slave.
A system in which remote I/O points are controlled through a Master
mounted to a CPU Rack or an Expansion I/O Rack connected to the CPU
Rack.
Any of the Units in a Remote I/O System. Remote I/O Units include Masters,
Slaves, Optical I/O Units, I/O Link Units, and Remote Terminals.
An I/O word allocated to a Unit in a Remote I/O System.
The process of turning a bit or signal OFF or of changing the present value of
a timer or counter to its set value or to zero.
The process by which instruction execution shifts from a subroutine back to
the main program (usually the point from which the subroutine was called).
A counter that can be both incremented and decremented depending on the
specified conditions.
A shift register that can shift data in either direction depending on the speci-
fied conditions.
Another term for terminal instruction.
The lowest numbered bits of a group of bits, generally of an entire word, or
the lowest numbered words of a group of words. These bits/words are often
called least-significant bits/words.
A shift register in which the data moved out from one end is placed back into
the shift register at the other end.
The operating mode used by the PC for normal control operations.
An interrupt that is automatically generated by the system at a specific time
or program location specified by the operator. Scheduled interrupts result in
the execution of specific subroutines that can be used for instructions that
must be executed repeatedly for a specified period of time.
A process whereby the system checks its own operation and generates a
warning or error if an abnormality is discovered.
A bit that is programmed to maintain either an OFF or ON status until set or
reset by specified conditions.
The process whereby the PC provides data to or receives data from external
devices or remote I/O Units, or otherwise handles data transactions for Link
Systems.